powerpc/mm: change #include "mmu_decl.h" to <mm/mmu_decl.h>
authorChristophe Leroy <christophe.leroy@c-s.fr>
Fri, 29 Mar 2019 09:59:59 +0000 (09:59 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 2 May 2019 11:18:58 +0000 (21:18 +1000)
This patch make inclusion of mmu_decl.h independant of the location
of the file including it.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
17 files changed:
arch/powerpc/mm/40x_mmu.c
arch/powerpc/mm/44x_mmu.c
arch/powerpc/mm/8xx_mmu.c
arch/powerpc/mm/dma-noncoherent.c
arch/powerpc/mm/fsl_booke_mmu.c
arch/powerpc/mm/init_32.c
arch/powerpc/mm/init_64.c
arch/powerpc/mm/mem.c
arch/powerpc/mm/mmu_context_nohash.c
arch/powerpc/mm/pgtable-book3e.c
arch/powerpc/mm/pgtable-book3s64.c
arch/powerpc/mm/pgtable-hash64.c
arch/powerpc/mm/pgtable_32.c
arch/powerpc/mm/pgtable_64.c
arch/powerpc/mm/ppc_mmu_32.c
arch/powerpc/mm/tlb_hash32.c
arch/powerpc/mm/tlb_nohash.c

index b9cf6f8764b0075ee5250b0aeb52ae9367f060f2..460459b6f53ee7f59324c49a2aaa434381360ea9 100644 (file)
@@ -49,7 +49,7 @@
 #include <asm/machdep.h>
 #include <asm/setup.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 extern int __map_without_ltlbs;
 /*
index aad127acdbaaa662be29222a2f48d94290bc9883..c07983ebc02e31e57d1c9160db38817ed6e3af0e 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/cacheflush.h>
 #include <asm/code-patching.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 /* Used by the 44x TLB replacement exception handler.
  * Just needed it declared someplace.
index 87648b58d2958167f8c992a96b1385de822ab27b..70d55b615b6286a6ca6cbe6985a4f54d0fe3e639 100644 (file)
@@ -17,7 +17,7 @@
 #include <asm/fixmap.h>
 #include <asm/code-patching.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 #define IMMR_SIZE (FIX_IMMR_SIZE << PAGE_SHIFT)
 
index b5d2658c26afb783d9e2900f8f09d7be0d36f500..2f6154b763286aa81a6b6bc1bb053debdef5f314 100644 (file)
@@ -36,7 +36,7 @@
 #include <asm/tlbflush.h>
 #include <asm/dma.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 /*
  * This address range defaults to a value that is safe for all
index 210cbc1faf6389c50b8480c050cb0c40a474f70a..71a1a36751dde96a3aa7d2fd3360fcbfb542391a 100644 (file)
@@ -54,7 +54,7 @@
 #include <asm/setup.h>
 #include <asm/paca.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 unsigned int tlbcam_index;
 
index 80cc97cd88782ef376e8e9d8a47017c4b7ff610c..3eb4cb09749c68f3da26e8edeab46e1b6265942e 100644 (file)
@@ -47,7 +47,7 @@
 #include <asm/hugetlb.h>
 #include <asm/kup.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 #if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
 /* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
index a4c155af159756b85cd2432d22e5949126de0621..45b02fa11cd81c4c4e1cb8297313e4587a9a4e0d 100644 (file)
@@ -66,7 +66,7 @@
 #include <asm/iommu.h>
 #include <asm/vdso.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 phys_addr_t memstart_addr = ~0;
 EXPORT_SYMBOL_GPL(memstart_addr);
index e12bec98366fa1fd110ca92b3b78b79d0e054917..105c58f8900aa4707950ee3c459272c914cce5c3 100644 (file)
@@ -54,7 +54,7 @@
 #include <asm/swiotlb.h>
 #include <asm/rtas.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 #ifndef CPU_FTR_COHERENT_ICACHE
 #define CPU_FTR_COHERENT_ICACHE        0       /* XXX for now */
index 1945c5f19f5efb312084664a5531161d92005f4e..ae4505d5b4b8737e72cd6142f7e2d24dabcc0161 100644 (file)
@@ -52,7 +52,7 @@
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 /*
  * The MPC8xx has only 16 contexts. We rotate through them on each task switch.
index 390a6d0b216d2e05221f2015717d2ddf86658ac6..f296c2e88b09c55e162818ed9238b00ddabc38e9 100644 (file)
@@ -15,7 +15,7 @@
 #include <asm/tlb.h>
 #include <asm/dma.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 /*
index a4341aba0af4dab36898cb5f62c1f8ae629c70b6..16bda049187ab843b969e718eed33f030214b725 100644 (file)
@@ -17,7 +17,7 @@
 #include <asm/trace.h>
 #include <asm/powernv.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 #include <trace/events/thp.h>
 
 unsigned long __pmd_frag_nr;
index 097a3b3538b1587b33626dda96ce1bc9c147edf9..1fd025dba4a3a8365fa2a744ba71eeb4034ff610 100644 (file)
@@ -19,7 +19,7 @@
 #include <asm/mmu.h>
 #include <asm/tlb.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/thp.h>
index 6e56a6240bfa4da1ee1815bb01835c596fad5e1a..c9cdbb84d31f8f0b0674471c13e99b7e4b43a67d 100644 (file)
@@ -36,7 +36,7 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 unsigned long ioremap_bot;
 EXPORT_SYMBOL(ioremap_bot);    /* aka VMALLOC_END */
index 95ad2a09501c8db27c1efd13073b17fa59c2a3a5..95ed76519411589f788f3d3d1c57f5df467ca1f3 100644 (file)
@@ -52,7 +52,7 @@
 #include <asm/firmware.h>
 #include <asm/dma.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 
 #ifdef CONFIG_PPC_BOOK3S_64
index bf1de3ca39bcee99137704ccc9a6222475d20914..1db55159031ceda2a26067d3a1c085cbf4d72ff5 100644 (file)
@@ -34,7 +34,7 @@
 #include <asm/code-patching.h>
 #include <asm/sections.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 struct hash_pte *Hash, *Hash_end;
 unsigned long Hash_size, Hash_mask;
index cf8472cf3d593ad4630d822a965ef684c61b22cc..8d56f0417f8717a58f5c41d26de92e92e663de55 100644 (file)
@@ -32,7 +32,7 @@
 #include <asm/tlbflush.h>
 #include <asm/tlb.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 /*
  * Called when unmapping pages to flush entries from the TLB/hash table.
index 088e0a6b5adea5191381efe9cd9221d6c7dead5b..704e613a0b144ad2d17420390a4ba0ee88cffae8 100644 (file)
@@ -46,7 +46,7 @@
 #include <asm/hugetlb.h>
 #include <asm/paca.h>
 
-#include "mmu_decl.h"
+#include <mm/mmu_decl.h>
 
 /*
  * This struct lists the sw-supported page sizes.  The hardawre MMU may support