drm/i915/guc: move guc irq functions to intel_guc parameter

No functional change, just moving the guc_to_i915 from the caller into
the irq function. This will help with the upcoming move of guc under
intel_gt.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190713100016.8026-4-chris@chris-wilson.co.uk
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7c5ba5cbea348a04240589c23989279aefa97ae9..831d185c07d23818d260a30d8bd4f05b3dc2cd59 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -599,8 +599,10 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv)
                gen6_reset_rps_interrupts(dev_priv);
 }
 
-void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
+void gen9_reset_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
        assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
        spin_lock_irq(&dev_priv->irq_lock);
@@ -608,61 +610,71 @@ void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv)
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
-void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv)
+void gen9_enable_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
        assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
        spin_lock_irq(&dev_priv->irq_lock);
-       if (!dev_priv->guc.interrupts.enabled) {
+       if (!guc->interrupts.enabled) {
                WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) &
                                       dev_priv->pm_guc_events);
-               dev_priv->guc.interrupts.enabled = true;
+               guc->interrupts.enabled = true;
                gen6_enable_pm_irq(&dev_priv->gt, dev_priv->pm_guc_events);
        }
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
-void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
+void gen9_disable_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
        assert_rpm_wakelock_held(&dev_priv->runtime_pm);
 
        spin_lock_irq(&dev_priv->irq_lock);
-       dev_priv->guc.interrupts.enabled = false;
+       guc->interrupts.enabled = false;
 
        gen6_disable_pm_irq(&dev_priv->gt, dev_priv->pm_guc_events);
 
        spin_unlock_irq(&dev_priv->irq_lock);
        intel_synchronize_irq(dev_priv);
 
-       gen9_reset_guc_interrupts(dev_priv);
+       gen9_reset_guc_interrupts(guc);
 }
 
-void gen11_reset_guc_interrupts(struct drm_i915_private *i915)
+void gen11_reset_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *i915 = guc_to_i915(guc);
+
        spin_lock_irq(&i915->irq_lock);
        gen11_reset_one_iir(&i915->gt, 0, GEN11_GUC);
        spin_unlock_irq(&i915->irq_lock);
 }
 
-void gen11_enable_guc_interrupts(struct drm_i915_private *dev_priv)
+void gen11_enable_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
        spin_lock_irq(&dev_priv->irq_lock);
-       if (!dev_priv->guc.interrupts.enabled) {
+       if (!guc->interrupts.enabled) {
                u32 events = REG_FIELD_PREP(ENGINE1_MASK,
                                            GEN11_GUC_INTR_GUC2HOST);
 
                WARN_ON_ONCE(gen11_reset_one_iir(&dev_priv->gt, 0, GEN11_GUC));
                I915_WRITE(GEN11_GUC_SG_INTR_ENABLE, events);
                I915_WRITE(GEN11_GUC_SG_INTR_MASK, ~events);
-               dev_priv->guc.interrupts.enabled = true;
+               guc->interrupts.enabled = true;
        }
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
-void gen11_disable_guc_interrupts(struct drm_i915_private *dev_priv)
+void gen11_disable_guc_interrupts(struct intel_guc *guc)
 {
+       struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
        spin_lock_irq(&dev_priv->irq_lock);
-       dev_priv->guc.interrupts.enabled = false;
+       guc->interrupts.enabled = false;
 
        I915_WRITE(GEN11_GUC_SG_INTR_MASK, ~0);
        I915_WRITE(GEN11_GUC_SG_INTR_ENABLE, 0);
@@ -670,7 +682,7 @@ void gen11_disable_guc_interrupts(struct drm_i915_private *dev_priv)
        spin_unlock_irq(&dev_priv->irq_lock);
        intel_synchronize_irq(dev_priv);
 
-       gen11_reset_guc_interrupts(dev_priv);
+       gen11_reset_guc_interrupts(guc);
 }
 
 /**

diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 4f803f910177f6cfacd2f63db676fd75960d9e28..8918809cd8051081ff3bc4a1584d8d4c0f9a426b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -12,6 +12,7 @@
 
 struct drm_i915_private;
 struct intel_crtc;
+struct intel_guc;
 
 void intel_irq_init(struct drm_i915_private *dev_priv);
 void intel_irq_fini(struct drm_i915_private *dev_priv);
@@ -112,12 +113,12 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
                                     u8 pipe_mask);
 void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
                                     u8 pipe_mask);
-void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv);
-void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv);
-void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv);
-void gen11_reset_guc_interrupts(struct drm_i915_private *i915);
-void gen11_enable_guc_interrupts(struct drm_i915_private *i915);
-void gen11_disable_guc_interrupts(struct drm_i915_private *i915);
+void gen9_reset_guc_interrupts(struct intel_guc *guc);
+void gen9_enable_guc_interrupts(struct intel_guc *guc);
+void gen9_disable_guc_interrupts(struct intel_guc *guc);
+void gen11_reset_guc_interrupts(struct intel_guc *guc);
+void gen11_enable_guc_interrupts(struct intel_guc *guc);
+void gen11_disable_guc_interrupts(struct intel_guc *guc);
 
 bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
                              bool in_vblank_irq, int *vpos, int *hpos,

diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 91d538fd5f654c4053f6ea8341c92917628923cb..6852352381ce5bb9f3eab497ced8fd9018d5e163 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -56,9 +56,9 @@ struct intel_guc {
 
        struct {
                bool enabled;
-               void (*reset)(struct drm_i915_private *i915);
-               void (*enable)(struct drm_i915_private *i915);
-               void (*disable)(struct drm_i915_private *i915);
+               void (*reset)(struct intel_guc *guc);
+               void (*enable)(struct intel_guc *guc);
+               void (*disable)(struct intel_guc *guc);
        } interrupts;
 
        struct i915_vma *ads_vma;

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index e2b20f8e88cf71704cbed04c769212ad4a3a59fb..4ea7661705b1d1cec7e5f3b257fb7f3d3ff954bb 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -272,17 +272,17 @@ static void guc_handle_mmio_msg(struct intel_guc *guc)
 
 static void guc_reset_interrupts(struct intel_guc *guc)
 {
-       guc->interrupts.reset(guc_to_i915(guc));
+       guc->interrupts.reset(guc);
 }
 
 static void guc_enable_interrupts(struct intel_guc *guc)
 {
-       guc->interrupts.enable(guc_to_i915(guc));
+       guc->interrupts.enable(guc);
 }
 
 static void guc_disable_interrupts(struct intel_guc *guc)
 {
-       guc->interrupts.disable(guc_to_i915(guc));
+       guc->interrupts.disable(guc);
 }
 
 static int guc_enable_communication(struct intel_guc *guc)