.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
};
#endif
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
#ifndef CONFIG_SYS_NAND_LARGEPAGE
static struct nand_ecclayout nand_hw_eccoob = {
.eccbytes = 9,
if (spare_only)
MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
- if (is_mxc_nfc_11()) {
+ if (is_mxc_nfc_21()) {
int i;
/*
* The controller copies the 64 bytes of spare data from
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
- if (is_mxc_nfc_11()) {
+ if (is_mxc_nfc_21()) {
int i;
/*
*/
}
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
struct nand_chip *chip,
int page, int sndcmd)
case NAND_CMD_PAGEPROG:
send_prog_page(host, 0, host->spare_only);
- if (host->pagesize_2k && !is_mxc_nfc_11()) {
+ if (host->pagesize_2k && is_mxc_nfc_1()) {
/* data in 4 areas */
send_prog_page(host, 1, host->spare_only);
send_prog_page(host, 2, host->spare_only);
send_cmd(host, NAND_CMD_READSTART);
/* read for each AREA */
send_read_page(host, 0, host->spare_only);
- if (!is_mxc_nfc_11()) {
+ if (is_mxc_nfc_1()) {
send_read_page(host, 1, host->spare_only);
send_read_page(host, 2, host->spare_only);
send_read_page(host, 3, host->spare_only);
this->ecc.calculate = mxc_nand_calculate_ecc;
this->ecc.hwctl = mxc_nand_enable_hwecc;
this->ecc.correct = mxc_nand_correct_data;
- if (is_mxc_nfc_11()) {
+ if (is_mxc_nfc_21()) {
this->ecc.mode = NAND_ECC_HW_SYNDROME;
this->ecc.read_page = mxc_nand_read_page_syndrome;
this->ecc.read_page_raw = mxc_nand_read_page_raw_syndrome;
this->ecc.layout = &nand_hw_eccoob;
#endif
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
tmp = readw(&host->regs->config1);
tmp |= NFC_ONE_CYCLE;
tmp |= NFC_4_8N_ECC;
* to support up to 2K byte pagesize nand.
* Reading or writing a 2K page requires 4 FDI/FDO cycles.
*
- * MX25 and MX35 have version 1.1, which has:
+ * MX25 and MX35 have version 2.1, which has:
* 8 512-byte main buffers and
* 8 64-byte spare buffers
* to support up to 4K byte pagesize nand.
*/
#if defined(CONFIG_MX27) || defined(CONFIG_MX31)
#define MXC_NFC_V1
-#define is_mxc_nfc_11() 0
+#define is_mxc_nfc_1() 1
+#define is_mxc_nfc_21() 0
#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
-#define MXC_NFC_V1_1
-#define is_mxc_nfc_11() 1
+#define MXC_NFC_V2_1
+#define is_mxc_nfc_1() 0
+#define is_mxc_nfc_21() 1
#else
#error "MXC NFC implementation not supported"
#endif
#define NAND_MXC_SPARE_BUF_SIZE 16
#define NAND_MXC_REG_OFFSET 0xe00
#define NAND_MXC_2K_MULTI_CYCLE
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
#define NAND_MXC_NR_BUFS 8
#define NAND_MXC_SPARE_BUF_SIZE 64
#define NAND_MXC_REG_OFFSET 0x1e00
u16 nf_wrprst;
u16 config1;
u16 config2;
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
u16 reserved2[2];
u16 buf_addr;
u16 flash_addr;
*/
#define NFC_INT 0x8000
-#ifdef MXC_NFC_V1_1
+#ifdef MXC_NFC_V2_1
#define NFC_4_8N_ECC (1 << 0)
#endif
#define NFC_SP_EN (1 << 2)
static void nfc_nand_init(void)
{
-#if defined(MXC_NFC_V1_1)
+#if defined(MXC_NFC_V2_1)
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
int config1;
#if defined(MXC_NFC_V1)
u16 ecc_status = readw(&nfc->ecc_status_result);
return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
-#elif defined(MXC_NFC_V1_1)
+#elif defined(MXC_NFC_V2_1)
u32 ecc_status = readl(&nfc->ecc_status_result);
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;