--- /dev/null
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_AG71XX=y
+CONFIG_AG71XX_AR8216_SUPPORT=y
+# CONFIG_AG71XX_DEBUG is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_AR7 is not set
+CONFIG_AR71XX_MACH_AP81=y
+CONFIG_AR71XX_MACH_AP83=y
+CONFIG_AR71XX_MACH_AW_NR580=y
+CONFIG_AR71XX_MACH_DIR_825_B1=y
+CONFIG_AR71XX_MACH_GENERIC=y
+CONFIG_AR71XX_MACH_MZK_W04NU=y
+CONFIG_AR71XX_MACH_MZK_W300NH=y
+CONFIG_AR71XX_MACH_PB42=y
+CONFIG_AR71XX_MACH_PB44=y
+CONFIG_AR71XX_MACH_RB_4XX=y
+CONFIG_AR71XX_MACH_TEW_632BRP=y
+CONFIG_AR71XX_MACH_TL_WR741ND=y
+CONFIG_AR71XX_MACH_TL_WR941ND=y
+CONFIG_AR71XX_MACH_UBNT=y
+CONFIG_AR71XX_MACH_WNDR3700=y
+CONFIG_AR71XX_MACH_WNR2000=y
+CONFIG_AR71XX_MACH_WP543=y
+CONFIG_AR71XX_MACH_WRT160NL=y
+CONFIG_AR71XX_MACH_WRT400N=y
+CONFIG_AR71XX_WDT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ATHEROS_AR71XX=y
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+CONFIG_BITREVERSE=y
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd console=ttyS0,115200"
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+# CONFIG_CPU_LOONGSON2E is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+CONFIG_CPU_MIPSR2=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_VR41XX is not set
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DEVPORT=y
+# CONFIG_DM9000 is not set
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_MC33880 is not set
+CONFIG_GPIO_PCF857X=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HW_HAS_PCI=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_GPIO=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_IMAGE_CMDLINE_HACK=y
+# CONFIG_INITRAMFS_COMPRESSION_LZO is not set
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_SOURCE="../../root"
+CONFIG_IRQ_CPU=y
+# CONFIG_ISDN is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_M25PXX_USE_FAST_READ is not set
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_LOONGSON is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MFD_MC13783 is not set
+CONFIG_MICREL_PHY=y
+# CONFIG_MIKROTIK_RB532 is not set
+CONFIG_MIPS=y
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_MACHINE=y
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+# CONFIG_MIPS_SIM is not set
+CONFIG_MTD_AR91XX_FLASH=y
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_MYLOADER_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_RB4XX=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
+CONFIG_MTD_REDBOOT_PARTS=y
+# CONFIG_MTD_SST25L is not set
+CONFIG_MTD_WRT160NL_PARTS=y
+CONFIG_MYLOADER=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_TAG_DSA is not set
+# CONFIG_NET_DSA_TAG_EDSA is not set
+CONFIG_NET_DSA_TAG_TRAILER=y
+# CONFIG_NO_IOPORT is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PHYLIB=y
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PROBE_INITRD_HEADER is not set
+CONFIG_RTL8306_PHY=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SPI=y
+CONFIG_SPI_AP83=y
+CONFIG_SPI_AR71XX=y
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_PB44=y
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_VSC7385 is not set
+CONFIG_SWCONFIG=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+# CONFIG_TC35815 is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_YAFFS_9BYTE_TAGS=y
+CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
+CONFIG_YAFFS_YAFFS1=y
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_ZONE_DMA_FLAG=0
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -624,6 +624,13 @@ else
+ load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
+ endif
+
++#
++# Atheros AR71xx
++#
++core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/
++cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx
++load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000
++
+ # temporary until string.h is fixed
+ cflags-y += -ffreestanding
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -43,6 +43,23 @@ config AR7
+ Support for the Texas Instruments AR7 System-on-a-Chip
+ family: TNETD7100, 7200 and 7300.
+
++config ATHEROS_AR71XX
++ bool "Atheros AR71xx based boards"
++ select CEVT_R4K
++ select CSRC_R4K
++ select DMA_NONCOHERENT
++ select HW_HAS_PCI
++ select IRQ_CPU
++ select ARCH_REQUIRE_GPIOLIB
++ select SYS_HAS_CPU_MIPS32_R1
++ select SYS_HAS_CPU_MIPS32_R2
++ select SYS_SUPPORTS_32BIT_KERNEL
++ select SYS_SUPPORTS_BIG_ENDIAN
++ select SYS_HAS_EARLY_PRINTK
++ select MIPS_MACHINE
++ help
++ Support for Atheros AR71xx based boards.
++
+ config BASLER_EXCITE
+ bool "Basler eXcite smart camera"
+ select CEVT_R4K
+@@ -674,6 +691,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
+ endchoice
+
+ source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar71xx/Kconfig"
+ source "arch/mips/basler/excite/Kconfig"
+ source "arch/mips/bcm63xx/Kconfig"
+ source "arch/mips/jazz/Kconfig"
--- /dev/null
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -18,6 +18,7 @@ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
+ obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
+ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
+ ops-bcm63xx.o
++obj-$(CONFIG_ATHEROS_AR71XX) += pci-ar71xx.o pci-ar724x.o
+
+ #
+ # These are still pretty much in the old state, watch, go blind.
--- /dev/null
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -98,6 +98,13 @@ config USB_EHCI_BIG_ENDIAN_DESC
+ depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX)
+ default y
+
++config USB_EHCI_AR71XX
++ bool "USB EHCI support for AR71xx"
++ depends on USB_EHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in EHCI controller
++
+ config USB_EHCI_FSL
+ bool "Support for Freescale on-chip EHCI USB controller"
+ depends on USB_EHCI_HCD && FSL_SOC
+@@ -189,6 +196,13 @@ config USB_OHCI_HCD
+ To compile this driver as a module, choose M here: the
+ module will be called ohci-hcd.
+
++config USB_OHCI_AR71XX
++ bool "USB OHCI support for Atheros AR71xx"
++ depends on USB_OHCI_HCD && ATHEROS_AR71XX
++ default y
++ help
++ Support for Atheros AR71xx built-in OHCI controller
++
+ config USB_OHCI_HCD_PPC_SOC
+ bool "OHCI support for on-chip PPC USB controller"
+ depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -1140,6 +1140,11 @@ MODULE_LICENSE ("GPL");
+ #define PLATFORM_DRIVER ehci_atmel_driver
+ #endif
+
++#ifdef CONFIG_USB_EHCI_AR71XX
++#include "ehci-ar71xx.c"
++#define PLATFORM_DRIVER ehci_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
+ #error "missing bus glue for ehci-hcd"
+--- a/drivers/usb/host/ohci-hcd.c
++++ b/drivers/usb/host/ohci-hcd.c
+@@ -1085,6 +1085,11 @@ MODULE_LICENSE ("GPL");
+ #define TMIO_OHCI_DRIVER ohci_hcd_tmio_driver
+ #endif
+
++#ifdef CONFIG_USB_OHCI_AR71XX
++#include "ohci-ar71xx.c"
++#define PLATFORM_DRIVER ohci_hcd_ar71xx_driver
++#endif
++
+ #if !defined(PCI_DRIVER) && \
+ !defined(PLATFORM_DRIVER) && \
+ !defined(OF_PLATFORM_DRIVER) && \
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -53,6 +53,13 @@ if SPI_MASTER
+
+ comment "SPI Master Controller Drivers"
+
++config SPI_AR71XX
++ tristate "Atheros AR71xx SPI Controller"
++ depends on SPI_MASTER && ATHEROS_AR71XX
++ select SPI_BITBANG
++ help
++ This is the SPI contoller driver for Atheros AR71xx.
++
+ config SPI_ATMEL
+ tristate "Atmel SPI Controller"
+ depends on (ARCH_AT91 || AVR32)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -11,6 +11,7 @@ endif
+ obj-$(CONFIG_SPI_MASTER) += spi.o
+
+ # SPI master controller drivers (bus)
++obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
+ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
+ obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
--- /dev/null
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2126,6 +2126,8 @@ config ACENIC_OMIT_TIGON_I
+
+ The safe and default value for this is N.
+
++source drivers/net/ag71xx/Kconfig
++
+ config DL2K
+ tristate "DL2000/TC902x-based Gigabit Ethernet support"
+ depends on PCI
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -106,6 +106,7 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac/
+ # end link order section
+ #
+
++obj-$(CONFIG_AG71XX) += ag71xx/
+ obj-$(CONFIG_SUNDANCE) += sundance.o
+ obj-$(CONFIG_HAMACHI) += hamachi.o
+ obj-$(CONFIG_NET) += Space.o loopback.o
--- /dev/null
+--- a/drivers/watchdog/Kconfig
++++ b/drivers/watchdog/Kconfig
+@@ -850,6 +850,13 @@ config TXX9_WDT
+ help
+ Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
+
++config AR71XX_WDT
++ tristate "Atheros AR71xx Watchdog Timer"
++ depends on ATHEROS_AR71XX
++ help
++ Hardware driver for the built-in watchdog timer on the Atheros
++ AR71xx SoCs.
++
+ # PARISC Architecture
+
+ # POWERPC Architecture
+--- a/drivers/watchdog/Makefile
++++ b/drivers/watchdog/Makefile
+@@ -113,6 +113,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
+ obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
+ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
++obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
+
+ # PARISC Architecture
+
--- /dev/null
+--- a/drivers/mtd/maps/Kconfig
++++ b/drivers/mtd/maps/Kconfig
+@@ -259,6 +259,13 @@ config MTD_ALCHEMY
+ help
+ Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
+
++config MTD_AR91XX_FLASH
++ tristate "Atheros AR91xx parallel flash support"
++ depends on ATHEROS_AR71XX
++ select MTD_COMPLEX_MAPPINGS
++ help
++ Parallel flash driver for the Atheros AR91xx based boards.
++
+ config MTD_DILNETPC
+ tristate "CFI Flash device mapped on DIL/Net PC"
+ depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
+--- a/drivers/mtd/maps/Makefile
++++ b/drivers/mtd/maps/Makefile
+@@ -41,6 +41,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
+ obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
+ obj-$(CONFIG_MTD_PCI) += pci.o
+ obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
++obj-$(CONFIG_MTD_AR91XX_FLASH) += ar91xx_flash.o
+ obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
+ obj-$(CONFIG_MTD_EDB7312) += edb7312.o
+ obj-$(CONFIG_MTD_IMPA7) += impa7.o
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -626,6 +626,10 @@ static struct flash_info __devinitdata m
+ { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
+ { "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
+
++ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
++ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
++ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
++
+ /* Spansion -- single (large) sector size only, at least
+ * for the chips listed here (without boot sectors).
+ */
--- /dev/null
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -114,6 +114,11 @@ config RTL8306_PHY
+ tristate "Driver for Realtek RTL8306S switches"
+ select SWCONFIG
+
++config MICREL_PHY
++ tristate "Drivers for Micrel/Kendin PHYs"
++ ---help---
++ Currently has a driver for the KSZ8041
++
+ config FIXED_PHY
+ bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
+ depends on PHYLIB=y
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -21,6 +21,7 @@ obj-$(CONFIG_REALTEK_PHY) += realtek.o
+ obj-$(CONFIG_AR8216_PHY) += ar8216.o
+ obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
++obj-$(CONFIG_MICREL) += micrel.o
+ obj-$(CONFIG_FIXED_PHY) += fixed.o
+ obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
+ obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -856,6 +856,16 @@ static int __devinit m25p_probe(struct s
+ part_probes, &parts, 0);
+ }
+
++#ifdef CONFIG_MTD_MYLOADER_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "MyLoader", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
++
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -626,6 +626,10 @@ static struct flash_info __devinitdata m
+ { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
+ { "mx25l12855e", 0xc22618, 0, 64 * 1024, 256, },
+
++ /* EON -- en25pxx */
++ { "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
++ { "en25p64", 0x1c2017, 0, 64 * 1024, 128, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -870,6 +870,15 @@ static int __devinit m25p_probe(struct s
+ }
+ #endif
+
++#ifdef CONFIG_MTD_REDBOOT_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "RedBoot", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -630,6 +630,11 @@ static struct flash_info __devinitdata m
+ { "en25p32", 0x1c2016, 0, 64 * 1024, 64, },
+ { "en25p64", 0x1c2017, 0, 64 * 1024, 128, },
+
++ /* Macronix -- mx25lxxx */
++ { "mx25l32", 0xc22016, 0, 64 * 1024, 64, },
++ { "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
++ { "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -635,6 +635,11 @@ static struct flash_info __devinitdata m
+ { "mx25l64", 0xc22017, 0, 64 * 1024, 128, },
+ { "mx25l128", 0xc22018, 0, 64 * 1024, 256, },
+
++ /* Numonyx -- xxxs33b */
++ { "160s33b", 0x898911, 0, 64 * 1024, 64, },
++ { "320s33b", 0x898912, 0, 64 * 1024, 128, },
++ { "640s33b", 0x898913, 0, 64 * 1024, 256, },
++
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", 0, 32 * 1024, 2, SECT_4K },
+ { "pm25lv010", 0, 32 * 1024, 4, SECT_4K },
--- /dev/null
+--- a/drivers/mtd/chips/jedec_probe.c
++++ b/drivers/mtd/chips/jedec_probe.c
+@@ -166,6 +166,7 @@
+ #define SST39LF160 0x2782
+ #define SST39VF1601 0x234b
+ #define SST39VF3201 0x235b
++#define SST39VF6401B 0x236d
+ #define SST39LF512 0x00D4
+ #define SST39LF010 0x00D5
+ #define SST39LF020 0x00D6
+@@ -1556,6 +1557,18 @@ static const struct amd_flash_info jedec
+ ERASEINFO(0x10000,64),
+ }
+ }, {
++ .mfr_id = MANUFACTURER_SST,
++ .dev_id = SST39VF6401B,
++ .name = "SST 39VF6401B",
++ .devtypes = CFI_DEVICETYPE_X16,
++ .uaddr = MTD_UADDR_0xAAAA_0x5555,
++ .dev_size = SIZE_8MiB,
++ .cmd_set = P_ID_AMD_STD,
++ .nr_regions = 1,
++ .regions = {
++ ERASEINFO(0x10000,128)
++ }
++ }, {
+ .mfr_id = MANUFACTURER_ST,
+ .dev_id = M29F800AB,
+ .name = "ST M29F800AB",
--- /dev/null
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -1568,7 +1568,7 @@ static int __xipram do_erase_chip(struct
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr))
++ if (chip_good(map, adr, map_word_ff(map)))
+ break;
+
+ if (time_after(jiffies, timeo)) {
+@@ -1656,7 +1656,7 @@ static int __xipram do_erase_oneblock(st
+ chip->erase_suspended = 0;
+ }
+
+- if (chip_ready(map, adr)) {
++ if (chip_good(map, adr, map_word_ff(map))) {
+ xip_enable(map, chip, adr);
+ break;
+ }
--- /dev/null
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -889,6 +889,16 @@ static int __devinit m25p_probe(struct s
+ part_probes, &parts, 0);
+ }
+ #endif
++
++#ifdef CONFIG_MTD_WRT160NL_PARTS
++ if (nr_parts <= 0) {
++ static const char *part_probes[]
++ = { "wrt160nl", NULL, };
++
++ nr_parts = parse_mtd_partitions(&flash->mtd,
++ part_probes, &parts, 0);
++ }
++#endif
+ if (nr_parts <= 0 && data && data->parts) {
+ parts = data->parts;
+ nr_parts = data->nr_parts;
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -181,6 +181,12 @@ config MTD_AR7_PARTS
+ ---help---
+ TI AR7 partitioning support
+
++config MTD_WRT160NL_PARTS
++ tristate "Linksys WRT160NL partitioning support"
++ depends on MTD_PARTITIONS && AR71XX_MACH_WRT160NL
++ ---help---
++ Linksys WRT160NL partitioning support
++
+ config MTD_MYLOADER_PARTS
+ tristate "MyLoader partition parsing"
+ depends on MTD_PARTITIONS && (ADM5120 || ATHEROS_AR231X || ATHEROS_AR71XX)
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redbo
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
++obj-$(CONFIG_MTD_WRT160NL_PARTS) += wrt160nl_part.o
+ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
+ obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+
--- /dev/null
+--- a/drivers/usb/host/ehci-q.c
++++ b/drivers/usb/host/ehci-q.c
+@@ -1167,6 +1167,9 @@ static void end_unlink_async (struct ehc
+ ehci->reclaim = NULL;
+ start_unlink_async (ehci, next);
+ }
++
++ if (ehci->has_synopsys_hc_bug)
++ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
+ }
+
+ /* makes sure the async qh will become idle */
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -129,6 +129,7 @@ struct ehci_hcd { /* one per controlle
+ unsigned has_amcc_usb23:1;
+ unsigned need_io_watchdog:1;
+ unsigned broken_periodic:1;
++ unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
+
+ /* required for usb32 quirk */
+ #define OHCI_CTRL_HCFS (3 << 6)
--- /dev/null
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -60,31 +60,32 @@ static int parse_redboot_partitions(stru
+ static char nullstring[] = "unallocated";
+ #endif
+
++ buf = vmalloc(master->erasesize);
++ if (!buf)
++ return -ENOMEM;
++
++ restart:
+ if ( directory < 0 ) {
+ offset = master->size + directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ if (!offset) {
+ nogood:
+ printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
++ vfree(buf);
+ return -EIO;
+ }
+ offset -= master->erasesize;
+ }
+ } else {
+ offset = directory * master->erasesize;
+- while (master->block_isbad &&
++ while (master->block_isbad &&
+ master->block_isbad(master, offset)) {
+ offset += master->erasesize;
+ if (offset == master->size)
+ goto nogood;
+ }
+ }
+- buf = vmalloc(master->erasesize);
+-
+- if (!buf)
+- return -ENOMEM;
+-
+ printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
+ master->name, offset);
+
+@@ -156,6 +157,11 @@ static int parse_redboot_partitions(stru
+ }
+ if (i == numslots) {
+ /* Didn't find it */
++ if (offset + master->erasesize < master->size) {
++ /* not at the end of the flash yet, maybe next block :) */
++ directory++;
++ goto restart;
++ }
+ printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
+ master->name);
+ ret = 0;
--- /dev/null
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -482,4 +482,8 @@ config MTD_NAND_W90P910
+ This enables the driver for the NAND Flash on evaluation board based
+ on w90p910.
+
++config MTD_NAND_RB4XX
++ tristate "NAND flash driver for RouterBoard 4xx series"
++ depends on MTD_NAND && ATHEROS_AR71XX
++
+ endif # MTD_NAND
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -31,6 +31,7 @@ obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) +=
+ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
+ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
+ obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
++obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o
+ obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
+ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
--- /dev/null
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -11,6 +11,7 @@ endif
+ obj-$(CONFIG_SPI_MASTER) += spi.o
+
+ # SPI master controller drivers (bus)
++obj-$(CONFIG_SPI_AP83) += ap83_spi.o
+ obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
+ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -53,6 +53,14 @@ if SPI_MASTER
+
+ comment "SPI Master Controller Drivers"
+
++config SPI_AP83
++ tristate "Atheros AP83 specific SPI Controller"
++ depends on SPI_MASTER && AR71XX_MACH_AP83
++ select SPI_BITBANG
++ help
++ This is a specific SPI controller driver for the Atheros AP83
++ reference board.
++
+ config SPI_AR71XX
+ tristate "Atheros AR71xx SPI Controller"
+ depends on SPI_MASTER && ATHEROS_AR71XX
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -296,6 +296,11 @@ config SPI_TLE62X0
+ sysfs interface, with each line presented as a kind of GPIO
+ exposing both switch control and diagnostic feedback.
+
++config SPI_VSC7385
++ tristate "Vitesse VSC7385 ethernet switch driver"
++ help
++ SPI driver for the Vitesse VSC7385 ethernet switch.
++
+ #
+ # Add new SPI protocol masters in alphabetical order above this line
+ #
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -40,6 +40,7 @@ obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.
+
+ # SPI protocol drivers (device/link on bus)
+ obj-$(CONFIG_SPI_SPIDEV) += spidev.o
++obj-$(CONFIG_SPI_VSC7385) += spi_vsc7385.o
+ obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
+ # ... add above this line ...
+
--- /dev/null
+--- a/drivers/spi/Kconfig
++++ b/drivers/spi/Kconfig
+@@ -68,6 +68,14 @@ config SPI_AR71XX
+ help
+ This is the SPI contoller driver for Atheros AR71xx.
+
++config SPI_PB44
++ tristate "Atheros PB44 board specific SPI controller"
++ depends on SPI_MASTER && AR71XX_MACH_PB44
++ select SPI_BITBANG
++ help
++ This is a specific SPI controller driver for the Atheros PB44
++ reference board.
++
+ config SPI_ATMEL
+ tristate "Atmel SPI Controller"
+ depends on (ARCH_AT91 || AVR32)
+--- a/drivers/spi/Makefile
++++ b/drivers/spi/Makefile
+@@ -22,6 +22,7 @@ obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
+ obj-$(CONFIG_SPI_GPIO_OLD) += spi_gpio_old.o
+ obj-$(CONFIG_SPI_IMX) += spi_imx.o
+ obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
++obj-$(CONFIG_SPI_PB44) += pb44_spi.o
+ obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
+ obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
+ obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
--- /dev/null
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -169,6 +169,7 @@ endif
+ #
+ libs-$(CONFIG_ARC) += arch/mips/fw/arc/
+ libs-$(CONFIG_CFE) += arch/mips/fw/cfe/
++libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/
+ libs-$(CONFIG_SNIPROM) += arch/mips/fw/sni/
+ libs-y += arch/mips/fw/lib/
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -880,6 +880,9 @@ config MIPS_NILE4
+ config MIPS_DISABLE_OBSOLETE_IDE
+ bool
+
++config MYLOADER
++ bool
++
+ config SYNC_R4K
+ bool
+
--- /dev/null
+--- a/drivers/net/ag71xx/ag71xx_main.c
++++ b/drivers/net/ag71xx/ag71xx_main.c
+@@ -593,7 +593,7 @@ static void ag71xx_oom_timer_handler(uns
+ struct net_device *dev = (struct net_device *) data;
+ struct ag71xx *ag = netdev_priv(dev);
+
+- netif_rx_schedule(dev, &ag->napi);
++ netif_rx_schedule(&ag->napi);
+ }
+
+ static void ag71xx_tx_timeout(struct net_device *dev)
+@@ -749,7 +749,7 @@ static int ag71xx_poll(struct napi_struc
+ DBG("%s: disable polling mode, done=%d, limit=%d\n",
+ dev->name, done, limit);
+
+- netif_rx_complete(dev, napi);
++ netif_rx_complete(napi);
+
+ /* enable interrupts */
+ spin_lock_irqsave(&ag->lock, flags);
+@@ -768,7 +768,7 @@ static int ag71xx_poll(struct napi_struc
+ printk(KERN_DEBUG "%s: out of memory\n", dev->name);
+
+ mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL);
+- netif_rx_complete(dev, napi);
++ netif_rx_complete(napi);
+ return 0;
+ }
+
+@@ -798,7 +798,7 @@ static irqreturn_t ag71xx_interrupt(int
+ if (likely(status & AG71XX_INT_POLL)) {
+ ag71xx_int_disable(ag, AG71XX_INT_POLL);
+ DBG("%s: enable polling mode\n", dev->name);
+- netif_rx_schedule(dev, &ag->napi);
++ netif_rx_schedule(&ag->napi);
+ }
+
+ return IRQ_HANDLED;
--- /dev/null
+--- a/drivers/net/ag71xx/ag71xx_main.c
++++ b/drivers/net/ag71xx/ag71xx_main.c
+@@ -593,7 +593,7 @@ static void ag71xx_oom_timer_handler(uns
+ struct net_device *dev = (struct net_device *) data;
+ struct ag71xx *ag = netdev_priv(dev);
+
+- netif_rx_schedule(&ag->napi);
++ napi_schedule(&ag->napi);
+ }
+
+ static void ag71xx_tx_timeout(struct net_device *dev)
+@@ -749,7 +749,7 @@ static int ag71xx_poll(struct napi_struc
+ DBG("%s: disable polling mode, done=%d, limit=%d\n",
+ dev->name, done, limit);
+
+- netif_rx_complete(napi);
++ napi_complete(napi);
+
+ /* enable interrupts */
+ spin_lock_irqsave(&ag->lock, flags);
+@@ -768,7 +768,7 @@ static int ag71xx_poll(struct napi_struc
+ printk(KERN_DEBUG "%s: out of memory\n", dev->name);
+
+ mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL);
+- netif_rx_complete(napi);
++ napi_complete(napi);
+ return 0;
+ }
+
+@@ -798,7 +798,7 @@ static irqreturn_t ag71xx_interrupt(int
+ if (likely(status & AG71XX_INT_POLL)) {
+ ag71xx_int_disable(ag, AG71XX_INT_POLL);
+ DBG("%s: enable polling mode\n", dev->name);
+- netif_rx_schedule(&ag->napi);
++ napi_schedule(&ag->napi);
+ }
+
+ return IRQ_HANDLED;
--- /dev/null
+--- a/drivers/net/ag71xx/ag71xx_main.c
++++ b/drivers/net/ag71xx/ag71xx_main.c
+@@ -809,6 +809,18 @@ static void ag71xx_set_multicast_list(st
+ /* TODO */
+ }
+
++static const struct net_device_ops ag71xx_netdev_ops = {
++ .ndo_open = ag71xx_open,
++ .ndo_stop = ag71xx_stop,
++ .ndo_start_xmit = ag71xx_hard_start_xmit,
++ .ndo_set_multicast_list = ag71xx_set_multicast_list,
++ .ndo_do_ioctl = ag71xx_do_ioctl,
++ .ndo_tx_timeout = ag71xx_tx_timeout,
++ .ndo_change_mtu = eth_change_mtu,
++ .ndo_set_mac_address = eth_mac_addr,
++ .ndo_validate_addr = eth_validate_addr,
++};
++
+ static int __init ag71xx_probe(struct platform_device *pdev)
+ {
+ struct net_device *dev;
+@@ -884,14 +896,9 @@ static int __init ag71xx_probe(struct pl
+ }
+
+ dev->base_addr = (unsigned long)ag->mac_base;
+- dev->open = ag71xx_open;
+- dev->stop = ag71xx_stop;
+- dev->hard_start_xmit = ag71xx_hard_start_xmit;
+- dev->set_multicast_list = ag71xx_set_multicast_list;
+- dev->do_ioctl = ag71xx_do_ioctl;
++ dev->netdev_ops = &ag71xx_netdev_ops;
+ dev->ethtool_ops = &ag71xx_ethtool_ops;
+
+- dev->tx_timeout = ag71xx_tx_timeout;
+ INIT_WORK(&ag->restart_work, ag71xx_restart_work_func);
+
+ init_timer(&ag->oom_timer);
--- /dev/null
+--- a/arch/mips/ar71xx/devices.c
++++ b/arch/mips/ar71xx/devices.c
+@@ -825,6 +825,8 @@ static struct platform_device ar71xx_dsa
+ void __init ar71xx_add_device_dsa(unsigned int id,
+ struct dsa_platform_data *d)
+ {
++ int i;
++
+ switch (id) {
+ case 0:
+ d->netdev = &ar71xx_eth0_device.dev;
+@@ -838,7 +840,10 @@ void __init ar71xx_add_device_dsa(unsign
+ id);
+ return;
+ }
+- d->mii_bus = &ar71xx_mdio_device.dev;
++
++ for (i = 0; i < d->nr_chips; i++)
++ d->chip[i].mii_bus = &ar71xx_mdio_device.dev;
++
+ ar71xx_dsa_switch_device.dev.platform_data = d;
+
+ platform_device_register(&ar71xx_dsa_switch_device);
+--- a/arch/mips/ar71xx/mach-tl-wr941nd.c
++++ b/arch/mips/ar71xx/mach-tl-wr941nd.c
+@@ -104,7 +104,7 @@ static struct gpio_button tl_wr941nd_gpi
+ }
+ };
+
+-static struct dsa_platform_data tl_wr941nd_dsa_data = {
++static struct dsa_chip_data tl_wr941nd_dsa_chip = {
+ .port_names[0] = "wan",
+ .port_names[1] = "lan1",
+ .port_names[2] = "lan2",
+@@ -113,6 +113,11 @@ static struct dsa_platform_data tl_wr941
+ .port_names[5] = "cpu",
+ };
+
++static struct dsa_platform_data tl_wr941nd_dsa_data = {
++ .nr_chips = 1,
++ .chip = &tl_wr941nd_dsa_chip,
++};
++
+ static void __init tl_wr941nd_setup(void)
+ {
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
--- /dev/null
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -48,6 +48,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/irq.h>
++#include <asm/time.h>
+
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
+@@ -1537,6 +1538,8 @@ void __cpuinit per_cpu_trap_init(void)
+ */
+ if (cpu_has_mips_r2) {
+ cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
++ if (get_c0_compare_irq)
++ cp0_compare_irq = get_c0_compare_irq();
+ cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+ if (cp0_perfcount_irq == cp0_compare_irq)
+ cp0_perfcount_irq = -1;
+--- a/arch/mips/include/asm/time.h
++++ b/arch/mips/include/asm/time.h
+@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
+ */
+ #ifdef CONFIG_CEVT_R4K_LIB
+ extern unsigned int __weak get_c0_compare_int(void);
++extern unsigned int __weak get_c0_compare_irq(void);
+ extern int r4k_clockevent_init(void);
+ #endif
+
--- /dev/null
+--- a/arch/mips/kernel/cevt-r4k.c
++++ b/arch/mips/kernel/cevt-r4k.c
+@@ -16,6 +16,22 @@
+ #include <asm/cevt-r4k.h>
+
+ /*
++ * Compare interrupt can be routed and latched outside the core,
++ * so a single execution hazard barrier may not be enough to give
++ * it time to clear as seen in the Cause register. 4 time the
++ * pipeline depth seems reasonably conservative, and empirically
++ * works better in configurations with high CPU/bus clock ratios.
++ */
++
++#define compare_change_hazard() \
++ do { \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ irq_disable_hazard(); \
++ } while (0)
++
++/*
+ * The SMTC Kernel for the 34K, 1004K, et. al. replaces several
+ * of these routines with SMTC-specific variants.
+ */
+@@ -31,6 +47,7 @@ static int mips_next_event(unsigned long
+ cnt = read_c0_count();
+ cnt += delta;
+ write_c0_compare(cnt);
++ compare_change_hazard();
+ res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
+ return res;
+ }
+@@ -100,22 +117,6 @@ static int c0_compare_int_pending(void)
+ return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+ }
+
+-/*
+- * Compare interrupt can be routed and latched outside the core,
+- * so a single execution hazard barrier may not be enough to give
+- * it time to clear as seen in the Cause register. 4 time the
+- * pipeline depth seems reasonably conservative, and empirically
+- * works better in configurations with high CPU/bus clock ratios.
+- */
+-
+-#define compare_change_hazard() \
+- do { \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- irq_disable_hazard(); \
+- } while (0)
+-
+ int c0_compare_int_usable(void)
+ {
+ unsigned int delta;
--- /dev/null
+--- a/drivers/net/phy/ar8216.c
++++ b/drivers/net/phy/ar8216.c
+@@ -563,10 +563,227 @@ ar8216_config_aneg(struct phy_device *ph
+ return 0;
+ }
+
++#define ar8216_dbg(fmt, args...) printk(KERN_DEBUG "ar8216: " fmt, ## args)
++
++static inline const char *ctrl_state_str(u32 ctrl)
++{
++ switch (ctrl & AR8216_PORT_CTRL_STATE) {
++ case AR8216_PORT_STATE_DISABLED:
++ return "disabled";
++ case AR8216_PORT_STATE_BLOCK:
++ return "block";
++ case AR8216_PORT_STATE_LISTEN:
++ return "listen";
++ case AR8216_PORT_STATE_LEARN:
++ return "learn";
++ case AR8216_PORT_STATE_FORWARD:
++ return "forward";
++ default:
++ break;
++ }
++
++ return "????";
++}
++
++static inline const char *ctrl_vlanmode_str(u32 ctrl)
++{
++ u32 vlan_mode;
++
++ vlan_mode = (ctrl & AR8216_PORT_CTRL_VLAN_MODE) >>
++ AR8216_PORT_CTRL_VLAN_MODE_S;
++ switch (vlan_mode) {
++ case AR8216_OUT_KEEP:
++ return "keep";
++ case AR8216_OUT_STRIP_VLAN:
++ return "strip vlan";
++ case AR8216_OUT_ADD_VLAN:
++ return "add_vlan";
++ default:
++ break;
++ }
++
++ return "????";
++}
++
++static inline const char *vlan_vlanmode_str(u32 vlan)
++{
++ u32 vlan_mode;
++
++ vlan_mode = (vlan & AR8216_PORT_VLAN_MODE) >>
++ AR8216_PORT_VLAN_MODE_S;
++ switch (vlan_mode) {
++ case AR8216_IN_PORT_ONLY:
++ return "port only";
++ case AR8216_IN_PORT_FALLBACK:
++ return "port fallback";
++ case AR8216_IN_VLAN_ONLY:
++ return "VLAN only";
++ case AR8216_IN_SECURE:
++ return "secure";
++ default:
++ break;
++ }
++
++ return "????";
++}
++
++static void
++ar8216_dump_regs(struct ar8216_priv *ap)
++{
++ unsigned int i;
++ u32 t;
++
++ t = ar8216_mii_read(ap, AR8216_REG_CTRL);
++ ar8216_dbg("CTRL\t\t: %08x\n", t);
++ ar8216_dbg(" version\t: %u\n", (t & 0xff00) >> 8);
++ ar8216_dbg(" revision\t: %u\n", (t & 0xff));
++
++ ar8216_dbg("POWER_ON\t: %08x\n",
++ ar8216_mii_read(ap, 0x04));
++ ar8216_dbg("INT\t\t: %08x\n",
++ ar8216_mii_read(ap, 0x10));
++ ar8216_dbg("INT_MASK\t: %08x\n",
++ ar8216_mii_read(ap, 0x14));
++ ar8216_dbg("MAC_ADDR0\t: %08x\n",
++ ar8216_mii_read(ap, 0x20));
++ ar8216_dbg("MAC_ADDR1\t: %08x\n",
++ ar8216_mii_read(ap, 0x24));
++ ar8216_dbg("FLOOD_MASK\t: %08x\n",
++ ar8216_mii_read(ap, 0x2c));
++
++ t = ar8216_mii_read(ap, AR8216_REG_GLOBAL_CTRL);
++ ar8216_dbg("GLOBAL_CTRL\t: %08x\n", t);
++ ar8216_dbg(" mtu\t\t: %lu\n", t & AR8216_GCTRL_MTU);
++
++ ar8216_dbg("FLOW_CONTROL0\t: %08x\n",
++ ar8216_mii_read(ap, 0x34));
++ ar8216_dbg("FLOW_CONTROL1\t: %08x\n",
++ ar8216_mii_read(ap, 0x38));
++ ar8216_dbg("QM_CONTROL\t: %08x\n",
++ ar8216_mii_read(ap, 0x3c));
++ ar8216_dbg("VLAN_TABLE0\t: %08x\n",
++ ar8216_mii_read(ap, AR8216_REG_VTU));
++ ar8216_dbg("VLAN_TABLE1\t: %08x\n",
++ ar8216_mii_read(ap, AR8216_REG_VTU_DATA));
++ ar8216_dbg("ADDR_TABLE0\t: %08x\n",
++ ar8216_mii_read(ap, AR8216_REG_ATU));
++ ar8216_dbg("ADDR_TABLE1\t: %08x\n",
++ ar8216_mii_read(ap, AR8216_REG_ATU_DATA));
++ ar8216_dbg("ADDR_TABLE2\t: %08x\n",
++ ar8216_mii_read(ap, 0x58));
++ ar8216_dbg("ADDR_CTRL\t: %08x\n",
++ ar8216_mii_read(ap, 0x5c));
++ ar8216_dbg("IP_PRIO0\t: %08x\n",
++ ar8216_mii_read(ap, 0x60));
++ ar8216_dbg("IP_PRIO1\t: %08x\n",
++ ar8216_mii_read(ap, 0x64));
++ ar8216_dbg("IP_PRIO2\t: %08x\n",
++ ar8216_mii_read(ap, 0x68));
++ ar8216_dbg("IP_PRIO3\t: %08x\n",
++ ar8216_mii_read(ap, 0x6c));
++ ar8216_dbg("TAG_PRIO\t: %08x\n",
++ ar8216_mii_read(ap, 0x70));
++ ar8216_dbg("SERVICE_TAG\t: %08x\n",
++ ar8216_mii_read(ap, 0x74));
++ ar8216_dbg("CPU_PORT\t: %08x\n",
++ ar8216_mii_read(ap, 0x78));
++ ar8216_dbg("MIB_FUNC\t: %08x\n",
++ ar8216_mii_read(ap, 0x80));
++ ar8216_dbg("MDIO\t\t: %08x\n",
++ ar8216_mii_read(ap, 0x98));
++ ar8216_dbg("LED0\t\t: %08x\n",
++ ar8216_mii_read(ap, 0xb0));
++ ar8216_dbg("LED1\t\t: %08x\n",
++ ar8216_mii_read(ap, 0xb4));
++ ar8216_dbg("LED2\t\t: %08x\n",
++ ar8216_mii_read(ap, 0xb8));
++
++ for (i = 0; i < 6; i++) {
++ u32 reg = 0x100 * (i + 1);
++
++ t = ar8216_mii_read(ap, AR8216_REG_PORT_STATUS(i));
++ ar8216_dbg("PORT%d_STATUS\t: %08x\n", i, t);
++ ar8216_dbg(" speed\t\t: %s\n",
++ (t & AR8216_PORT_STATUS_SPEED) ? "100" : "10");
++ ar8216_dbg(" speed error\t: %s\n",
++ (t & AR8216_PORT_STATUS_SPEED_ERR) ? "yes" : "no");
++ ar8216_dbg(" txmac\t\t: %d\n",
++ (t & AR8216_PORT_STATUS_TXMAC) ? 1 : 0);
++ ar8216_dbg(" rxmac\t\t: %d\n",
++ (t & AR8216_PORT_STATUS_RXMAC) ? 1 : 0);
++ ar8216_dbg(" tx_flow\t: %s\n",
++ (t & AR8216_PORT_STATUS_TXFLOW) ? "on" : "off");
++ ar8216_dbg(" rx_flow\t: %s\n",
++ (t & AR8216_PORT_STATUS_RXFLOW) ? "on" : "off");
++ ar8216_dbg(" duplex\t: %s\n",
++ (t & AR8216_PORT_STATUS_DUPLEX) ? "full" : "half");
++ ar8216_dbg(" link\t\t: %s\n",
++ (t & AR8216_PORT_STATUS_LINK_UP) ? "up" : "down");
++ ar8216_dbg(" auto\t\t: %s\n",
++ (t & AR8216_PORT_STATUS_LINK_AUTO) ? "on" : "off");
++ ar8216_dbg(" pause\t\t: %s\n",
++ (t & AR8216_PORT_STATUS_LINK_PAUSE) ? "on" : "off");
++
++ t = ar8216_mii_read(ap, AR8216_REG_PORT_CTRL(i));
++ ar8216_dbg("PORT%d_CTRL\t: %08x\n", i, t);
++ ar8216_dbg(" state\t\t: %s\n", ctrl_state_str(t));
++ ar8216_dbg(" learn lock\t: %s\n",
++ (t & AR8216_PORT_CTRL_LEARN_LOCK) ? "on" : "off");
++ ar8216_dbg(" vlan_mode\t: %s\n", ctrl_vlanmode_str(t));
++ ar8216_dbg(" igmp_snoop\t: %s\n",
++ (t & AR8216_PORT_CTRL_IGMP_SNOOP) ? "on" : "off");
++ ar8216_dbg(" header\t: %s\n",
++ (t & AR8216_PORT_CTRL_HEADER) ? "on" : "off");
++ ar8216_dbg(" mac_loop\t: %s\n",
++ (t & AR8216_PORT_CTRL_MAC_LOOP) ? "on" : "off");
++ ar8216_dbg(" single_vlan\t: %s\n",
++ (t & AR8216_PORT_CTRL_SINGLE_VLAN) ? "on" : "off");
++ ar8216_dbg(" mirror tx\t: %s\n",
++ (t & AR8216_PORT_CTRL_MIRROR_TX) ? "on" : "off");
++ ar8216_dbg(" mirror rx\t: %s\n",
++ (t & AR8216_PORT_CTRL_MIRROR_RX) ? "on" : "off");
++
++ t = ar8216_mii_read(ap, AR8216_REG_PORT_VLAN(i));
++ ar8216_dbg("PORT%d_VLAN\t: %08x\n", i, t);
++ ar8216_dbg(" default id\t: %lu\n",
++ (t & AR8216_PORT_VLAN_DEFAULT_ID));
++ ar8216_dbg(" dest ports\t: %s%s%s%s%s%s\n",
++ (t & 0x010000) ? "0 " : "",
++ (t & 0x020000) ? "1 " : "",
++ (t & 0x040000) ? "2 " : "",
++ (t & 0x080000) ? "3 " : "",
++ (t & 0x100000) ? "4 " : "",
++ (t & 0x200000) ? "5 " : "");
++ ar8216_dbg(" tx priority\t: %s\n",
++ (t & AR8216_PORT_VLAN_TX_PRIO) ? "on" : "off");
++ ar8216_dbg(" port priority\t: %lu\n",
++ (t & AR8216_PORT_VLAN_PRIORITY) >>
++ AR8216_PORT_VLAN_PRIORITY_S);
++ ar8216_dbg(" ingress mode\t: %s\n", vlan_vlanmode_str(t));
++
++ t = ar8216_mii_read(ap, AR8216_REG_PORT_RATE(i));
++ ar8216_dbg("PORT%d_RATE0\t: %08x\n", i, t);
++
++ ar8216_dbg("PORT%d_PRIO\t: %08x\n", i,
++ ar8216_mii_read(ap, AR8216_REG_PORT_PRIO(i)));
++ ar8216_dbg("PORT%d_STORM\t: %08x\n", i,
++ ar8216_mii_read(ap, reg + 0x14));
++ ar8216_dbg("PORT%d_QUEUE\t: %08x\n", i,
++ ar8216_mii_read(ap, reg + 0x18));
++ ar8216_dbg("PORT%d_RATE1\t: %08x\n", i,
++ ar8216_mii_read(ap, reg + 0x1c));
++ ar8216_dbg("PORT%d_RATE2\t: %08x\n", i,
++ ar8216_mii_read(ap, reg + 0x20));
++ ar8216_dbg("PORT%d_RATE3\t: %08x\n", i,
++ ar8216_mii_read(ap, reg + 0x24));
++ }
++}
++
+ static int
+ ar8216_probe(struct phy_device *pdev)
+ {
+ struct ar8216_priv priv;
++ static int regs_dumped;
+
+ u8 id, rev;
+ u32 val;
+@@ -575,9 +792,14 @@ ar8216_probe(struct phy_device *pdev)
+ val = ar8216_mii_read(&priv, AR8216_REG_CTRL);
+ rev = val & 0xff;
+ id = (val >> 8) & 0xff;
+- if ((id != 1) || (rev != 1))
++ if ((id != 1) || (rev != 1 && rev != 2))
+ return -ENODEV;
+
++ if (!regs_dumped) {
++ ar8216_dump_regs(&priv);
++ regs_dumped++;
++ }
++
+ return 0;
+ }
+
+--- a/drivers/net/phy/ar8216.h
++++ b/drivers/net/phy/ar8216.h
+@@ -27,7 +27,7 @@
+ #define AR8216_CTRL_RESET BIT(31)
+
+ #define AR8216_REG_GLOBAL_CTRL 0x0030
+-#define AR8216_GCTRL_MTU BITS(0, 10)
++#define AR8216_GCTRL_MTU BITS(0, 12)
+
+ #define AR8216_REG_VTU 0x0040
+ #define AR8216_VTU_OP BITS(0, 3)
projects / openwrt / staging / stintel.git / commitdiff