drm/radeon/dpm: implement force performance level for TN
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 2 Jul 2013 22:52:10 +0000 (18:52 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 5 Jul 2013 22:10:06 +0000 (18:10 -0400)
Allows you to force the selected performance level via sysfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ppsmc.h
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/trinity_dpm.c
drivers/gpu/drm/radeon/trinity_dpm.h
drivers/gpu/drm/radeon/trinity_smc.c

index fc71ca6b04cada2637239558d399203781722f71..b5564a3645d2d4c2b90e27267253c344af9eb054 100644 (file)
@@ -103,6 +103,7 @@ typedef uint8_t PPSMC_Result;
 #define PPSMC_MSG_DPM_Config                ((uint32_t) 0x102)
 #define PPSMC_MSG_DPM_ForceState            ((uint32_t) 0x104)
 #define PPSMC_MSG_PG_SIMD_Config            ((uint32_t) 0x108)
+#define PPSMC_MSG_DPM_N_LevelsDisabled      ((uint32_t) 0x112)
 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment   ((uint32_t) 0x11d)
 #define PPSMC_MSG_DCE_AllowVoltageAdjustment    ((uint32_t) 0x11e)
 #define PPSMC_MSG_UVD_DPM_Config            ((uint32_t) 0x124)
index 5d592aed1ee94306ff8772971ce89b87989af514..a6906d4ca734f62b08e2e987f042ada0c8ade3d0 100644 (file)
@@ -2115,6 +2115,7 @@ static struct radeon_asic trinity_asic = {
                .get_mclk = &trinity_dpm_get_mclk,
                .print_power_state = &trinity_dpm_print_power_state,
                .debugfs_print_current_performance_level = &trinity_dpm_debugfs_print_current_performance_level,
+               .force_performance_level = &trinity_dpm_force_performance_level,
        },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
index 1a89b3af04f33c06b6d31159192e1fd761fdbf24..4456f85a932e4652ce91b26dc6ec4a484d7e2c5d 100644 (file)
@@ -636,6 +636,8 @@ void trinity_dpm_print_power_state(struct radeon_device *rdev,
                                   struct radeon_ps *ps);
 void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
                                                         struct seq_file *m);
+int trinity_dpm_force_performance_level(struct radeon_device *rdev,
+                                       enum radeon_dpm_forced_level level);
 
 /* DCE6 - SI */
 void dce6_bandwidth_update(struct radeon_device *rdev);
index 8a32bcc6bbb5b13a3f9da2171d9007d08fc30b67..a1eb5f59939f14124ff24b0c1917b9e08f403dab 100644 (file)
@@ -1158,6 +1158,37 @@ static void trinity_setup_nbp_sim(struct radeon_device *rdev,
        }
 }
 
+int trinity_dpm_force_performance_level(struct radeon_device *rdev,
+                                       enum radeon_dpm_forced_level level)
+{
+       struct trinity_power_info *pi = trinity_get_pi(rdev);
+       struct radeon_ps *rps = &pi->current_rps;
+       struct trinity_ps *ps = trinity_get_ps(rps);
+       int i, ret;
+
+       if (ps->num_levels <= 1)
+               return 0;
+
+       if (level == RADEON_DPM_FORCED_LEVEL_HIGH) {
+               /* not supported by the hw */
+               return -EINVAL;
+       } else if (level == RADEON_DPM_FORCED_LEVEL_LOW) {
+               ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
+               if (ret)
+                       return ret;
+       } else {
+               for (i = 0; i < ps->num_levels; i++) {
+                       ret = trinity_dpm_n_levels_disabled(rdev, 0);
+                       if (ret)
+                               return ret;
+               }
+       }
+
+       rdev->pm.dpm.forced_level = level;
+
+       return 0;
+}
+
 int trinity_dpm_pre_set_power_state(struct radeon_device *rdev)
 {
        struct trinity_power_info *pi = trinity_get_pi(rdev);
@@ -1190,6 +1221,7 @@ int trinity_dpm_set_power_state(struct radeon_device *rdev)
                trinity_force_level_0(rdev);
                trinity_unforce_levels(rdev);
                trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
+               rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
        }
        trinity_release_mutex(rdev);
 
index c621b843aab570e787b0549a6ce642fa3e01cb10..e82df071f8b3e5e6f64265f150aa3c1fffb90b5a 100644 (file)
@@ -121,6 +121,7 @@ struct trinity_power_info {
 int trinity_dpm_config(struct radeon_device *rdev, bool enable);
 int trinity_uvd_dpm_config(struct radeon_device *rdev);
 int trinity_dpm_force_state(struct radeon_device *rdev, u32 n);
+int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n);
 int trinity_dpm_no_forced_level(struct radeon_device *rdev);
 int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
                                          bool enable);
index 85f86a29513c5bda8388c97e2a269d0821c66011..a42d89f1830cce2ae6611163601755c9de5243d6 100644 (file)
@@ -73,6 +73,13 @@ int trinity_dpm_force_state(struct radeon_device *rdev, u32 n)
        return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_ForceState);
 }
 
+int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n)
+{
+       WREG32_SMC(SMU_SCRATCH0, n);
+
+       return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_N_LevelsDisabled);
+}
+
 int trinity_uvd_dpm_config(struct radeon_device *rdev)
 {
        return trinity_notify_message_to_smu(rdev, PPSMC_MSG_UVD_DPM_Config);