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[MIPS] Cobalt: Fix IRQ comment; the Cobalt kernel uses CP0 counter now.
author
Yoichi Yuasa
<yoichi_yuasa@tripeaks.co.jp>
Thu, 1 Nov 2007 12:51:23 +0000
(21:51 +0900)
committer
Ralf Baechle
<ralf@linux-mips.org>
Fri, 2 Nov 2007 16:13:48 +0000
(16:13 +0000)
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
include/asm-mips/mach-cobalt/irq.h
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diff --git
a/include/asm-mips/mach-cobalt/irq.h
b/include/asm-mips/mach-cobalt/irq.h
index 179d0e850b59a6d35b6ec1ae009649f0e40ce858..57c8c9ac585162b6a16a32d912d7d438d0a772be 100644
(file)
--- a/
include/asm-mips/mach-cobalt/irq.h
+++ b/
include/asm-mips/mach-cobalt/irq.h
@@
-35,7
+35,7
@@
* 4 - ethernet
* 5 - 16550 UART
* 6 - cascade i8259
- * 7 - CP0 counter
(unused)
+ * 7 - CP0 counter
*/
#define MIPS_CPU_IRQ_BASE 16
@@
-48,7
+48,6
@@
#define SCSI_IRQ (MIPS_CPU_IRQ_BASE + 5)
#define I8259_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 6)
-
#define GT641XX_IRQ_BASE 24
#include <asm/irq_gt641xx.h>