drm/amd/display: Report stream as different on scaling change

When scaling is enabled, our preference is to scale up to the prefered
(native) mode. This means that hardware timings will be the same across
a modeset.

Therefore, also report mode as changed if source or destination
rectangle is different.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 09163d8d9332b4c42a0cdb907ef9a9bdfdf8d221..fad40da8422eca591da903aa9a313e44f1ab8f3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4428,12 +4428,13 @@ static int dm_update_crtcs_state(struct dc *dc,
                        }
                }
 
-               if (dc_is_stream_unchanged(new_stream, dm_old_crtc_state->stream)) {
+               if (dc_is_stream_unchanged(new_stream, dm_old_crtc_state->stream) &&
+                               dc_is_stream_scaling_unchanged(new_stream, dm_old_crtc_state->stream)) {
 
                        new_crtc_state->mode_changed = false;
 
                        DRM_DEBUG_DRIVER("Mode change not required, setting mode_changed to %d",
-                                       new_crtc_state->mode_changed);
+                                        new_crtc_state->mode_changed);
                }
 
 

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 454a521a268d286b35fba69e0b397da9d8d89dea..2a5c917724730ebf97b64c0e22305571dda62a6e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1335,6 +1335,28 @@ bool dc_is_stream_unchanged(
        return true;
 }
 
+bool dc_is_stream_scaling_unchanged(
+       struct dc_stream_state *old_stream, struct dc_stream_state *stream)
+{
+       if (old_stream == stream)
+               return true;
+
+       if (old_stream == NULL || stream == NULL)
+               return false;
+
+       if (memcmp(&old_stream->src,
+                       &stream->src,
+                       sizeof(struct rect)) != 0)
+               return false;
+
+       if (memcmp(&old_stream->dst,
+                       &stream->dst,
+                       sizeof(struct rect)) != 0)
+               return false;
+
+       return true;
+}
+
 /* Maximum TMDS single link pixel clock 165MHz */
 #define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index ace17d13683a097544309d5ebfab5d9b587de477..f60191d9c7e559686b97d67b4071552f9eba16b7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -627,6 +627,8 @@ struct dc_stream_update {
 
 bool dc_is_stream_unchanged(
        struct dc_stream_state *old_stream, struct dc_stream_state *stream);
+bool dc_is_stream_scaling_unchanged(
+       struct dc_stream_state *old_stream, struct dc_stream_state *stream);
 
 /*
  * Set up surface attributes and associate to a stream