amlogic: Fix prefixes in the SCPI related code
authorCarlo Caione <ccaione@baylibre.com>
Wed, 28 Aug 2019 09:08:24 +0000 (10:08 +0100)
committerCarlo Caione <ccaione@baylibre.com>
Thu, 5 Sep 2019 09:39:30 +0000 (10:39 +0100)
Add a new aml_* prefix to the SCPI related function calls.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739

plat/amlogic/common/aml_efuse.c
plat/amlogic/common/aml_scpi.c
plat/amlogic/common/aml_sip_svc.c
plat/amlogic/common/aml_thermal.c
plat/amlogic/common/include/aml_private.h
plat/amlogic/gxbb/gxbb_pm.c
plat/amlogic/gxl/gxl_bl31_setup.c
plat/amlogic/gxl/gxl_pm.c

index 9ab4ba297a3e8e772f5ec4b4b4e418cf7f055cfa..00884ebd51c7b4881e34c0c4ef74e62ffc03db97 100644 (file)
@@ -16,7 +16,7 @@ uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size)
        if ((uint64_t)(offset + size) > (uint64_t)EFUSE_SIZE)
                return 0;
 
-       return scpi_efuse_read(dst, offset + EFUSE_BASE, size);
+       return aml_scpi_efuse_read(dst, offset + EFUSE_BASE, size);
 }
 
 uint64_t aml_efuse_user_max(void)
index 0a8c97a31550fae1c69aad7550b304159a7fbd8a..728bcd0616598430f3a580f6c0975c261c8a589d 100644 (file)
 #define SCPI_CMD_SET_FW_ADDR 0xd3
 #define SCPI_CMD_FW_SIZE 0xd2
 
-static inline uint32_t scpi_cmd(uint32_t command, uint32_t size)
+static inline uint32_t aml_scpi_cmd(uint32_t command, uint32_t size)
 {
        return command | (size << SIZE_SHIFT);
 }
 
-static void scpi_secure_message_send(uint32_t command, uint32_t size)
+static void aml_scpi_secure_message_send(uint32_t command, uint32_t size)
 {
-       aml_mhu_secure_message_send(scpi_cmd(command, size));
+       aml_mhu_secure_message_send(aml_scpi_cmd(command, size));
 }
 
-uint32_t scpi_secure_message_receive(void **message_out, size_t *size_out)
+static uint32_t aml_scpi_secure_message_receive(void **message_out, size_t *size_out)
 {
        uint32_t response = aml_mhu_secure_message_wait();
 
@@ -57,7 +57,7 @@ uint32_t scpi_secure_message_receive(void **message_out, size_t *size_out)
        return response;
 }
 
-void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
+void aml_scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
                              uint32_t cluster_state, uint32_t css_state)
 {
        uint32_t state = (mpidr & 0x0F) | /* CPU ID */
@@ -68,26 +68,26 @@ void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
 
        aml_mhu_secure_message_start();
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, state);
-       aml_mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_CSS_POWER_STATE, 4));
+       aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_SET_CSS_POWER_STATE, 4));
        aml_mhu_secure_message_wait();
        aml_mhu_secure_message_end();
 }
 
-uint32_t scpi_sys_power_state(uint64_t system_state)
+uint32_t aml_scpi_sys_power_state(uint64_t system_state)
 {
        uint32_t *response;
        size_t size;
 
        aml_mhu_secure_message_start();
        mmio_write_8(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, system_state);
-       aml_mhu_secure_message_send(scpi_cmd(SCPI_CMD_SET_SYS_POWER_STATE, 1));
-       scpi_secure_message_receive((void *)&response, &size);
+       aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_SET_SYS_POWER_STATE, 1));
+       aml_scpi_secure_message_receive((void *)&response, &size);
        aml_mhu_secure_message_end();
 
        return *response;
 }
 
-void scpi_jtag_set_state(uint32_t state, uint8_t select)
+void aml_scpi_jtag_set_state(uint32_t state, uint8_t select)
 {
        assert(state <= AML_JTAG_STATE_OFF);
 
@@ -99,12 +99,12 @@ void scpi_jtag_set_state(uint32_t state, uint8_t select)
        aml_mhu_secure_message_start();
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD,
                      (state << 8) | (uint32_t)select);
-       aml_mhu_secure_message_send(scpi_cmd(SCPI_CMD_JTAG_SET_STATE, 4));
+       aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_JTAG_SET_STATE, 4));
        aml_mhu_secure_message_wait();
        aml_mhu_secure_message_end();
 }
 
-uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
+uint32_t aml_scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
 {
        uint32_t *response;
        size_t resp_size;
@@ -115,8 +115,8 @@ uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
        aml_mhu_secure_message_start();
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, base);
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 4, size);
-       aml_mhu_secure_message_send(scpi_cmd(SCPI_CMD_EFUSE_READ, 8));
-       scpi_secure_message_receive((void *)&response, &resp_size);
+       aml_mhu_secure_message_send(aml_scpi_cmd(SCPI_CMD_EFUSE_READ, 8));
+       aml_scpi_secure_message_receive((void *)&response, &resp_size);
        aml_mhu_secure_message_end();
 
        /*
@@ -129,26 +129,26 @@ uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size)
        return *response;
 }
 
-void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
-                         uint32_t arg2, uint32_t arg3)
+void aml_scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
+                             uint32_t arg2, uint32_t arg3)
 {
        aml_mhu_secure_message_start();
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x0, arg0);
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x4, arg1);
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0x8, arg2);
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD + 0xC, arg3);
-       aml_mhu_secure_message_send(scpi_cmd(0xC3, 16));
+       aml_mhu_secure_message_send(aml_scpi_cmd(0xC3, 16));
        aml_mhu_secure_message_wait();
        aml_mhu_secure_message_end();
 }
 
-static inline void scpi_copy_scp_data(uint8_t *data, size_t len)
+static inline void aml_scpi_copy_scp_data(uint8_t *data, size_t len)
 {
        void *dst = (void *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
        size_t sz;
 
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, len);
-       scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
+       aml_scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
        aml_mhu_secure_message_wait();
 
        for (sz = 0; sz < len; sz += SIZE_FWBLK) {
@@ -157,7 +157,7 @@ static inline void scpi_copy_scp_data(uint8_t *data, size_t len)
        }
 }
 
-static inline void scpi_set_scp_addr(uint64_t addr, size_t len)
+static inline void aml_scpi_set_scp_addr(uint64_t addr, size_t len)
 {
        volatile uint64_t *dst = (uint64_t *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
 
@@ -166,15 +166,15 @@ static inline void scpi_set_scp_addr(uint64_t addr, size_t len)
         * non cachable
         */
        *dst = addr;
-       scpi_secure_message_send(SCPI_CMD_SET_FW_ADDR, sizeof(addr));
+       aml_scpi_secure_message_send(SCPI_CMD_SET_FW_ADDR, sizeof(addr));
        aml_mhu_secure_message_wait();
 
        mmio_write_32(AML_MHU_SECURE_AP_TO_SCP_PAYLOAD, len);
-       scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
+       aml_scpi_secure_message_send(SCPI_CMD_FW_SIZE, len);
        aml_mhu_secure_message_wait();
 }
 
-static inline void scpi_send_fw_hash(uint8_t hash[], size_t len)
+static inline void aml_scpi_send_fw_hash(uint8_t hash[], size_t len)
 {
        void *dst = (void *)AML_MHU_SECURE_AP_TO_SCP_PAYLOAD;
 
@@ -193,7 +193,7 @@ static inline void scpi_send_fw_hash(uint8_t hash[], size_t len)
  * @param send: If set, actually copy the firmware in SCP memory otherwise only
  *  send the firmware address.
  */
-void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send)
+void aml_scpi_upload_scp_fw(uintptr_t addr, size_t size, int send)
 {
        struct asd_ctx ctx;
 
@@ -203,9 +203,9 @@ void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send)
 
        aml_mhu_secure_message_start();
        if (send == 0)
-               scpi_set_scp_addr(addr, size);
+               aml_scpi_set_scp_addr(addr, size);
        else
-               scpi_copy_scp_data((void *)addr, size);
+               aml_scpi_copy_scp_data((void *)addr, size);
 
-       scpi_send_fw_hash(ctx.digest, sizeof(ctx.digest));
+       aml_scpi_send_fw_hash(ctx.digest, sizeof(ctx.digest));
 }
index 6736a816a7d03f6ae03f5f75d604eef7f7dd47b7..8a9b070d82761e19374796a7abf56af7e55f1d24 100644 (file)
@@ -40,11 +40,11 @@ static uintptr_t aml_sip_handler(uint32_t smc_fid,
                SMC_RET1(handle,  aml_efuse_user_max());
 
        case AML_SM_JTAG_ON:
-               scpi_jtag_set_state(AML_JTAG_STATE_ON, x1);
+               aml_scpi_jtag_set_state(AML_JTAG_STATE_ON, x1);
                SMC_RET1(handle, 0);
 
        case AML_SM_JTAG_OFF:
-               scpi_jtag_set_state(AML_JTAG_STATE_OFF, x1);
+               aml_scpi_jtag_set_state(AML_JTAG_STATE_OFF, x1);
                SMC_RET1(handle, 0);
 
        default:
index 0a57f10f4efb2c1a0fd0a613f517548ab7ade4cb..53ed10323e6851633d7c8911acf166d2eab10826 100644 (file)
@@ -18,10 +18,10 @@ void aml_thermal_unknown(void)
        uint16_t ret;
 
        if (modules_initialized == -1) {
-               scpi_efuse_read(&ret, 0, 2);
+               aml_scpi_efuse_read(&ret, 0, 2);
                modules_initialized = ret;
        }
 
-       scpi_unknown_thermal(10, 2,  /* thermal */
-                            13, 1); /* thermalver */
+       aml_scpi_unknown_thermal(10, 2,  /* thermal */
+                                13, 1); /* thermalver */
 }
index 0d5a26c9be36e8d3908c42d50655967821f1769a..d6629fc3a4a8a197a66b34e30ef0f1af9460173d 100644 (file)
@@ -23,14 +23,14 @@ void aml_mhu_secure_message_end(void);
 void aml_mhu_secure_init(void);
 
 /* SCPI functions */
-void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
-                             uint32_t cluster_state, uint32_t css_state);
-uint32_t scpi_sys_power_state(uint64_t system_state);
-void scpi_jtag_set_state(uint32_t state, uint8_t select);
-uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size);
-void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
-                         uint32_t arg2, uint32_t arg3);
-void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send);
+void aml_scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state,
+                                 uint32_t cluster_state, uint32_t css_state);
+uint32_t aml_scpi_sys_power_state(uint64_t system_state);
+void aml_scpi_jtag_set_state(uint32_t state, uint8_t select);
+uint32_t aml_scpi_efuse_read(void *dst, uint32_t base, uint32_t size);
+void aml_scpi_unknown_thermal(uint32_t arg0, uint32_t arg1,
+                             uint32_t arg2, uint32_t arg3);
+void aml_scpi_upload_scp_fw(uintptr_t addr, size_t size, int send);
 
 /* Peripherals */
 void aml_thermal_unknown(void);
index 0d542a56c595a672736ea8d80651c0a7594685c8..20f655a6792e125fd49645da1707ab16416f5fdb 100644 (file)
@@ -52,7 +52,7 @@ static void __dead2 gxbb_system_reset(void)
 
        mmio_write_32(GXBB_AO_RTI_STATUS_REG3, status);
 
-       int ret = scpi_sys_power_state(SCPI_SYSTEM_REBOOT);
+       int ret = aml_scpi_sys_power_state(SCPI_SYSTEM_REBOOT);
 
        if (ret != 0) {
                ERROR("BL31: PSCI_SYSTEM_RESET: SCP error: %u\n", ret);
@@ -69,7 +69,7 @@ static void __dead2 gxbb_system_off(void)
 {
        INFO("BL31: PSCI_SYSTEM_OFF\n");
 
-       unsigned int ret = scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN);
+       unsigned int ret = aml_scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN);
 
        if (ret != 0) {
                ERROR("BL31: PSCI_SYSTEM_OFF: SCP error %u\n", ret);
@@ -103,8 +103,8 @@ static int32_t gxbb_pwr_domain_on(u_register_t mpidr)
        }
 
        gxbb_program_mailbox(mpidr, gxbb_sec_entrypoint);
-       scpi_set_css_power_state(mpidr,
-                                SCPI_POWER_ON, SCPI_POWER_ON, SCPI_POWER_ON);
+       aml_scpi_set_css_power_state(mpidr,
+                                    SCPI_POWER_ON, SCPI_POWER_ON, SCPI_POWER_ON);
        dmbsy();
        sev();
 
@@ -144,8 +144,8 @@ static void gxbb_pwr_domain_off(const psci_power_state_t *target_state)
        if (core == AML_PRIMARY_CPU)
                return;
 
-       scpi_set_css_power_state(mpidr,
-                                SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
+       aml_scpi_set_css_power_state(mpidr,
+                                    SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
 }
 
 static void __dead2 gxbb_pwr_domain_pwr_down_wfi(const psci_power_state_t
index 409222091a14976453bed3997825071f1b6f2c64..e7c42184d6ae65b69f90968b0b981e493ed3e7d6 100644 (file)
@@ -108,10 +108,10 @@ static inline bool gxl_scp_ready(void)
 
 static inline void gxl_scp_boot(void)
 {
-       scpi_upload_scp_fw(bl30_image_info.image_base,
-                       bl30_image_info.image_size, 0);
-       scpi_upload_scp_fw(bl301_image_info.image_base,
-                       bl301_image_info.image_size, 1);
+       aml_scpi_upload_scp_fw(bl30_image_info.image_base,
+                              bl30_image_info.image_size, 0);
+       aml_scpi_upload_scp_fw(bl301_image_info.image_base,
+                              bl301_image_info.image_size, 1);
        while (!gxl_scp_ready())
                ;
 }
index d6071bfc6c61a6a8e5c037bc427fe9e240b983eb..2e9f4b8b0a8f27298f926cc5846055d0fa81ed9a 100644 (file)
@@ -59,7 +59,7 @@ static void __dead2 gxbb_system_reset(void)
 
        mmio_write_32(GXBB_AO_RTI_STATUS_REG3, status);
 
-       ret = scpi_sys_power_state(SCPI_SYSTEM_REBOOT);
+       ret = aml_scpi_sys_power_state(SCPI_SYSTEM_REBOOT);
 
        if (ret != 0) {
                ERROR("BL31: PSCI_SYSTEM_RESET: SCP error: %i\n", ret);
@@ -81,7 +81,7 @@ static void __dead2 gxbb_system_off(void)
        u_register_t mpidr = read_mpidr_el1();
        int ret;
 
-       ret = scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN);
+       ret = aml_scpi_sys_power_state(SCPI_SYSTEM_SHUTDOWN);
 
        if (ret != 0) {
                ERROR("BL31: PSCI_SYSTEM_OFF: SCP error %i\n", ret);
@@ -117,8 +117,8 @@ static int32_t gxbb_pwr_domain_on(u_register_t mpidr)
        }
 
        gxl_pm_set_reset_addr(mpidr, gxbb_sec_entrypoint);
-       scpi_set_css_power_state(mpidr,
-                                SCPI_POWER_ON, SCPI_POWER_ON, SCPI_POWER_ON);
+       aml_scpi_set_css_power_state(mpidr,
+                                    SCPI_POWER_ON, SCPI_POWER_ON, SCPI_POWER_ON);
        dmbsy();
        sev();
 
@@ -155,8 +155,8 @@ static void gxbb_pwr_domain_off(const psci_power_state_t *target_state)
        if (core == AML_PRIMARY_CPU)
                return;
 
-       scpi_set_css_power_state(mpidr,
-                                SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
+       aml_scpi_set_css_power_state(mpidr,
+                                    SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
 }
 
 static void __dead2 gxbb_pwr_domain_pwr_down_wfi(const psci_power_state_t