cxgb4: Differentiates between TIDs being used in TCAM and HASH
authorHariprasad Shenai <hariprasad@chelsio.com>
Wed, 12 Aug 2015 11:25:05 +0000 (16:55 +0530)
committerDavid S. Miller <davem@davemloft.net>
Wed, 12 Aug 2015 23:42:12 +0000 (16:42 -0700)
For the tid info, differentiate from which region the TID is allocated
from. It can be from TCAM region or HASH region.

Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

index 27e87b6baa455cc41c85510ce6a54d23d3cae8e7..df6cba1a6546d8c12d144d5f243390372eca8851 100644 (file)
@@ -1654,20 +1654,25 @@ static void process_tid_release_list(struct work_struct *work)
  */
 void cxgb4_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid)
 {
-       void *old;
        struct sk_buff *skb;
        struct adapter *adap = container_of(t, struct adapter, tids);
 
-       old = t->tid_tab[tid];
+       WARN_ON(tid >= t->ntids);
+
+       if (t->tid_tab[tid]) {
+               t->tid_tab[tid] = NULL;
+               if (t->hash_base && (tid >= t->hash_base))
+                       atomic_dec(&t->hash_tids_in_use);
+               else
+                       atomic_dec(&t->tids_in_use);
+       }
+
        skb = alloc_skb(sizeof(struct cpl_tid_release), GFP_ATOMIC);
        if (likely(skb)) {
-               t->tid_tab[tid] = NULL;
                mk_tid_release(skb, chan, tid);
                t4_ofld_send(adap, skb);
        } else
                cxgb4_queue_tid_release(t, chan, tid);
-       if (old)
-               atomic_dec(&t->tids_in_use);
 }
 EXPORT_SYMBOL(cxgb4_remove_tid);
 
@@ -1705,6 +1710,7 @@ static int tid_init(struct tid_info *t)
        t->afree = NULL;
        t->atids_in_use = 0;
        atomic_set(&t->tids_in_use, 0);
+       atomic_set(&t->hash_tids_in_use, 0);
 
        /* Setup the free list for atid_tab and clear the stid bitmap. */
        if (natids) {
@@ -4814,6 +4820,22 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                adapter->params.offload = 0;
        }
 
+       if (is_offload(adapter)) {
+               if (t4_read_reg(adapter, LE_DB_CONFIG_A) & HASHEN_F) {
+                       u32 hash_base, hash_reg;
+
+                       if (chip <= CHELSIO_T5) {
+                               hash_reg = LE_DB_TID_HASHBASE_A;
+                               hash_base = t4_read_reg(adapter, hash_reg);
+                               adapter->tids.hash_base = hash_base / 4;
+                       } else {
+                               hash_reg = T6_LE_DB_HASH_TID_BASE_A;
+                               hash_base = t4_read_reg(adapter, hash_reg);
+                               adapter->tids.hash_base = hash_base;
+                       }
+               }
+       }
+
        /* See what interrupts we'll be using */
        if (msi > 1 && enable_msix(adapter) == 0)
                adapter->flags |= USING_MSIX;
index b27897d4f787896e0934aa1f126ddf76cdda5aa8..f61fed12eeae89180fbf43eccd83785d8a8392c4 100644 (file)
@@ -96,6 +96,7 @@ struct tid_info {
        unsigned long *stid_bmap;
        unsigned int nstids;
        unsigned int stid_base;
+       unsigned int hash_base;
 
        union aopen_entry *atid_tab;
        unsigned int natids;
@@ -117,7 +118,10 @@ struct tid_info {
        spinlock_t stid_lock;
        unsigned int stids_in_use;
 
+       /* TIDs in the TCAM */
        atomic_t tids_in_use;
+       /* TIDs in the HASH */
+       atomic_t hash_tids_in_use;
 };
 
 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
@@ -147,7 +151,10 @@ static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
                                    unsigned int tid)
 {
        t->tid_tab[tid] = data;
-       atomic_inc(&t->tids_in_use);
+       if (t->hash_base && (tid >= t->hash_base))
+               atomic_inc(&t->hash_tids_in_use);
+       else
+               atomic_inc(&t->tids_in_use);
 }
 
 int cxgb4_alloc_atid(struct tid_info *t, void *data);
index e444dc4ebbd8fd11ec177a3f7d90d9d8930b18fb..365ebd5dfb46e747833dc5edc30ce61db67a1d2c 100644 (file)
 #define LE_DB_HASH_TBL_BASE_ADDR_A 0x19c30
 #define LE_DB_INT_CAUSE_A 0x19c3c
 #define LE_DB_TID_HASHBASE_A 0x19df8
+#define T6_LE_DB_HASH_TID_BASE_A 0x19df8
 
 #define HASHEN_S    20
 #define HASHEN_V(x) ((x) << HASHEN_S)