LINUX_VERSION-3.18 = .43
LINUX_VERSION-4.4 = .52
-LINUX_VERSION-4.9 = .13
+LINUX_VERSION-4.9 = .14
LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
LINUX_KERNEL_HASH-4.4.52 = e8d2ddaece73e1a34e045bbdcdcc1383f658e24537797f8d8e0dd520cf1b1f06
-LINUX_KERNEL_HASH-4.9.13 = 36464aec4fb32ed192252645819abb55ceb21eef17b3f7210b4a673e7486a268
+LINUX_KERNEL_HASH-4.9.14 = 534d343f4ca5c55d7214694a2a378897e8ee2adf576563f069da010093b3b640
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
#include <asm/msa.h>
#include <asm/pgtable.h>
#include <asm/mipsregs.h>
-@@ -511,7 +512,19 @@ EXPORT_SYMBOL(unwind_stack_by_address);
+@@ -556,7 +557,19 @@ EXPORT_SYMBOL(unwind_stack_by_address);
unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
unsigned long pc, unsigned long *ra)
{
} else {
core->dev.dma_mask = &core->dev.coherent_dma_mask;
core->dma_dev = &core->dev;
-@@ -633,8 +634,11 @@ static int bcma_device_probe(struct devi
- drv);
- int err = 0;
-
-+ get_device(dev);
- if (adrv->probe)
- err = adrv->probe(core);
-+ if (err)
-+ put_device(dev);
-
- return err;
- }
-@@ -647,6 +651,7 @@ static int bcma_device_remove(struct dev
-
- if (adrv->remove)
- adrv->remove(core);
-+ put_device(dev);
-
- return 0;
- }
- int idx, shift, w_size;
-
- w_size = controller->w_size;
--
-- while (controller->rx_bytes < xfer->len) {
+ int i, shift, num_bytes;
+ u32 word;
+- while (controller->rx_bytes < xfer->len) {
+-
- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
- if (0 == (state & QUP_OP_IN_FIFO_NOT_EMPTY))
- break;
- int idx, w_size;
+ u32 remainder, words_per_block, num_words;
+ bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK;
-
-- w_size = controller->w_size;
++
+ remainder = DIV_ROUND_UP(xfer->len - controller->rx_bytes,
+ controller->w_size);
+ words_per_block = controller->in_blk_sz >> 2;
-
-- while (controller->tx_bytes < xfer->len) {
++
+ do {
+ /* ACK by clearing service flag */
+ writel_relaxed(QUP_OP_IN_SERVICE_FLAG,
+ controller->base + QUP_OPERATIONAL);
-
-- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
-- if (state & QUP_OP_OUT_FIFO_FULL)
++
+ if (is_block_mode) {
+ num_words = (remainder > words_per_block) ?
+ words_per_block : remainder;
+ if (!spi_qup_is_flag_set(controller,
+ QUP_OP_IN_FIFO_NOT_EMPTY))
+ break;
-+
+
+- w_size = controller->w_size;
+ num_words = 1;
+ }
+
+ /* read up to the maximum transfer size available */
+ spi_qup_read_from_fifo(controller, xfer, num_words);
-+
+
+- while (controller->tx_bytes < xfer->len) {
+ remainder -= num_words;
-+
+
+- state = readl_relaxed(controller->base + QUP_OPERATIONAL);
+- if (state & QUP_OP_OUT_FIFO_FULL)
+ /* if block mode, check to see if next block is available */
+ if (is_block_mode && !spi_qup_is_flag_set(controller,
+ QUP_OP_IN_BLOCK_READ_REQ))
- /* must be zero for BLOCK and BAM */
- writel_relaxed(0, controller->base + QUP_MX_READ_CNT);
- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT);
-+ else
-+ controller->mode = QUP_IO_M_MODE_BLOCK;
-
+-
- if (!controller->qup_v1) {
- void __iomem *input_cnt;
-+ return 0;
-+}
-
+-
- input_cnt = controller->base + QUP_MX_INPUT_CNT;
- /*
- * for DMA transfers, both QUP_MX_INPUT_CNT and
- writel_relaxed(0, input_cnt);
- else
- writel_relaxed(n_words, input_cnt);
++ else
++ controller->mode = QUP_IO_M_MODE_BLOCK;
++
++ return 0;
++}
+
+/* prep qup for another spi transaction of specific type */
+static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
+{
+ struct spi_qup *controller = spi_master_get_devdata(spi->master);
+ u32 config, iomode, control;
+ unsigned long flags;
-
++
+ reinit_completion(&controller->done);
+ reinit_completion(&controller->dma_tx_done);
+
+ qup->n_words = SPI_MAX_XFER;
+ else
+ qup->n_words = n_words % SPI_MAX_XFER;
-
-- if (qup->mode == QUP_IO_M_MODE_FIFO)
-- spi_qup_write(qup, xfer);
++
+ if (qup->tx_buf && offset)
+ qup->tx_buf = xfer->tx_buf + offset * SPI_MAX_XFER;
-
-- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
-- if (ret) {
-- dev_warn(qup->dev, "cannot set RUN state\n");
-- return ret;
-- }
++
+ if (qup->rx_buf && offset)
+ qup->rx_buf = xfer->rx_buf + offset * SPI_MAX_XFER;
-
-- if (!wait_for_completion_timeout(&qup->done, timeout))
-- return -ETIMEDOUT;
++
+ /* if the transaction is small enough, we need
+ * to fallback to FIFO mode */
+ if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
+ qup->mode = QUP_IO_M_MODE_FIFO;
-+
+
+- if (qup->mode == QUP_IO_M_MODE_FIFO)
+- spi_qup_write(qup, xfer);
+ ret = spi_qup_io_config(spi, xfer);
+ if (ret)
+ return ret;
-+
+
+- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
+- if (ret) {
+- dev_warn(qup->dev, "cannot set RUN state\n");
+- return ret;
+- }
+ ret = spi_qup_set_state(qup, QUP_STATE_RUN);
+ if (ret) {
+ dev_warn(qup->dev, "cannot set RUN state\n");
+ return ret;
+ }
-+
+
+- if (!wait_for_completion_timeout(&qup->done, timeout))
+- return -ETIMEDOUT;
+ ret = spi_qup_set_state(qup, QUP_STATE_PAUSE);
+ if (ret) {
+ dev_warn(qup->dev, "cannot set PAUSE state\n");
- ret = spi_qup_io_config(spi, xfer);
- if (ret)
- return ret;
-+ rx_sgl = xfer->rx_sg.sgl;
-+ tx_sgl = xfer->tx_sg.sgl;
-
+-
- /* before issuing the descriptors, set the QUP to run */
- ret = spi_qup_set_state(qup, QUP_STATE_RUN);
- if (ret) {
- dev_warn(qup->dev, "cannot set RUN state\n");
- return ret;
- }
-+ do {
-+ int rx_nents = 0, tx_nents = 0;
-
+-
- if (!qup->qup_v1) {
- if (xfer->rx_buf)
- rx_done = spi_qup_dma_done;
-+ if (rx_sgl) {
-+ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER);
-+ if (rx_nents < 0)
-+ rx_nents = sg_nents(rx_sgl);
-
+-
- if (xfer->tx_buf)
- tx_done = spi_qup_dma_done;
- }
-+ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) /
-+ qup->w_size;
-+ }
-
+-
- if (xfer->rx_buf) {
- ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl,
- xfer->rx_sg.nents, DMA_DEV_TO_MEM,
- rx_done, &qup->done);
- if (ret)
- return ret;
-+ if (tx_sgl) {
-+ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER);
-+ if (tx_nents < 0)
-+ tx_nents = sg_nents(tx_sgl);
++ rx_sgl = xfer->rx_sg.sgl;
++ tx_sgl = xfer->tx_sg.sgl;
- dma_async_issue_pending(master->dma_rx);
- }
-+ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) /
-+ qup->w_size;
-+ }
++ do {
++ int rx_nents = 0, tx_nents = 0;
- if (xfer->tx_buf) {
- ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl,
- xfer->tx_sg.nents, DMA_MEM_TO_DEV,
- tx_done, &qup->dma_tx_done);
++ if (rx_sgl) {
++ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER);
++ if (rx_nents < 0)
++ rx_nents = sg_nents(rx_sgl);
++
++ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) /
++ qup->w_size;
++ }
++
++ if (tx_sgl) {
++ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER);
++ if (tx_nents < 0)
++ tx_nents = sg_nents(tx_sgl);
++
++ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) /
++ qup->w_size;
++ }
++
+
+ ret = spi_qup_io_config(spi, xfer);
if (ret)
+ dev_warn(qup->dev, "cannot set RUN state\n");
+ return ret;
+ }
-
-- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout))
-- return -ETIMEDOUT;
++
+ if (!qup->qup_v1) {
+ if (rx_sgl) {
+ rx_done = spi_qup_dma_done;
+ }
-
-- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout))
-- ret = -ETIMEDOUT;
++
+ if (tx_sgl) {
+ tx_done = spi_qup_dma_done;
+ }
+ }
-
-- return ret;
++
+ if (rx_sgl) {
+ ret = spi_qup_prep_sg(master, rx_sgl, rx_nents,
+ DMA_DEV_TO_MEM, rx_done,
+ pr_emerg(" tx timed out\n");
+ return -ETIMEDOUT;
+ }
-+
+
+- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout))
+- return -ETIMEDOUT;
+ for (; rx_sgl && rx_nents--; rx_sgl = sg_next(rx_sgl));
+ for (; tx_sgl && tx_nents--; tx_sgl = sg_next(tx_sgl));
-+
+
+- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout))
+- ret = -ETIMEDOUT;
+ } while (rx_sgl || tx_sgl);
-+
+
+- return ret;
+ return 0;
}
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+ };
-
-- nand-ecc-strength = <4>;
-- nand-ecc-step-size = <512>;
-- nand-bus-width = <8>;
++
+ phy4: ethernet-phy@4 {
+ device_type = "ethernet-phy";
+ reg = <4>;
+ status = "ok";
+ phy-mode = "sgmii";
+ qcom,id = <2>;
-+
+
+- nand-ecc-strength = <4>;
+- nand-ecc-step-size = <512>;
+- nand-bus-width = <8>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+++ /dev/null
-From: Felix Fietkau <nbd@nbd.name>
-Date: Thu, 19 Jan 2017 14:14:36 +0100
-Subject: [PATCH] MIPS: Lantiq: Keep ethernet enabled during boot
-
-Disabling ethernet during reboot (only to enable it again when the
-ethernet driver attaches) can put the chip into a faulty state where it
-corrupts the header of all incoming packets.
-
-This happens if packets arrive during the time window where the core is
-disabled, and it can be easily reproduced by rebooting while sending a
-flood ping to the broadcast address.
-
-Cc: john@phrozen.org
-Cc: hauke.mehrtens@lantiq.com
-Cc: stable@vger.kernel.org
-Fixes: 95135bfa7ead ("MIPS: Lantiq: Deactivate most of the devices by default")
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
-
---- a/arch/mips/lantiq/xway/sysctrl.c
-+++ b/arch/mips/lantiq/xway/sysctrl.c
-@@ -564,7 +564,7 @@ void __init ltq_soc_init(void)
- clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
- clkdev_add_pmu("1a800000.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
- clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
-- clkdev_add_pmu("1e108000.eth", NULL, 1, 0, PMU_SWITCH | PMU_PPE_DP);
-+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
- clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
- clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
- } else if (of_machine_is_compatible("lantiq,ar10")) {
-@@ -572,7 +572,7 @@ void __init ltq_soc_init(void)
- ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
- clkdev_add_pmu("1e101000.usb", "ctl", 1, 0, PMU_USB0);
- clkdev_add_pmu("1e106000.usb", "ctl", 1, 0, PMU_USB1);
-- clkdev_add_pmu("1e108000.eth", NULL, 1, 0, PMU_SWITCH |
-+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
- PMU_PPE_DP | PMU_PPE_TC);
- clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
- clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY);
-@@ -594,11 +594,11 @@ void __init ltq_soc_init(void)
- clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
-
- clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
-- clkdev_add_pmu("1e108000.eth", NULL, 1, 0,
-+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
- PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
- PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
- PMU_PPE_QSB | PMU_PPE_TOP);
-- clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY);
-+ clkdev_add_pmu("1f203000.rcu", "gphy", 0, 0, PMU_GPHY);
- clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
- clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
- clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
-Index: linux-4.9.13/include/dt-bindings/pinctrl/mt7623-pinfunc.h
-===================================================================
---- linux-4.9.13.orig/include/dt-bindings/pinctrl/mt7623-pinfunc.h
-+++ linux-4.9.13/include/dt-bindings/pinctrl/mt7623-pinfunc.h
+--- a/include/dt-bindings/pinctrl/mt7623-pinfunc.h
++++ b/include/dt-bindings/pinctrl/mt7623-pinfunc.h
@@ -505,6 +505,9 @@
#define MT7623_PIN_272_G2_RXD3_FUNC_GPIO272 (MTK_PIN_NO(272) | 0)
#define MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3 (MTK_PIN_NO(272) | 1)
#define MT7623_PIN_274_G2_RXDV_FUNC_GPIO274 (MTK_PIN_NO(274) | 0)
#define MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV (MTK_PIN_NO(274) | 1)
-Index: linux-4.9.13/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
-===================================================================
---- linux-4.9.13.orig/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
-+++ linux-4.9.13/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
+--- a/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
@@ -1894,8 +1894,9 @@ static const struct mtk_desc_pin mtk_pin
MTK_PIN(
PINCTRL_PIN(273, "GPIO273"),
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
-@@ -890,7 +890,8 @@ void phy_state_machine(struct work_struc
+@@ -996,7 +996,8 @@ void phy_state_machine(struct work_struc
/* If the link is down, give up on negotiation for now */
if (!phydev->link) {
phydev->state = PHY_NOLINK;
phydev->adjust_link(phydev->attached_dev);
break;
}
-@@ -973,7 +974,8 @@ void phy_state_machine(struct work_struc
+@@ -1079,7 +1080,8 @@ void phy_state_machine(struct work_struc
netif_carrier_on(phydev->attached_dev);
} else {
phydev->state = PHY_NOLINK;
}
phydev->adjust_link(phydev->attached_dev);
-@@ -985,7 +987,8 @@ void phy_state_machine(struct work_struc
+@@ -1091,7 +1093,8 @@ void phy_state_machine(struct work_struc
case PHY_HALTED:
if (phydev->link) {
phydev->link = 0;
}
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
-@@ -377,6 +377,7 @@ struct phy_device {
+@@ -373,6 +373,7 @@ struct phy_device {
bool is_pseudo_fixed_link;
bool has_fixups;
bool suspended;
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
-@@ -6,6 +6,14 @@
+@@ -6,6 +6,14 @@ config COMMON_CLK_MEDIATEK
---help---
Mediatek SoCs' clock support.
obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
-@@ -61,6 +61,26 @@
+@@ -61,6 +61,26 @@ static void mtk_cg_clr_bit(struct clk_hw
regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit));
}
static int mtk_cg_enable(struct clk_hw *hw)
{
mtk_cg_clr_bit(hw);
-@@ -85,6 +105,30 @@
+@@ -85,6 +105,30 @@ static void mtk_cg_disable_inv(struct cl
mtk_cg_clr_bit(hw);
}
const struct clk_ops mtk_clk_gate_ops_setclr = {
.is_enabled = mtk_cg_bit_is_cleared,
.enable = mtk_cg_enable,
-@@ -97,6 +141,18 @@
+@@ -97,6 +141,18 @@ const struct clk_ops mtk_clk_gate_ops_se
.disable = mtk_cg_disable_inv,
};
const char *parent_name,
--- a/drivers/clk/mediatek/clk-gate.h
+++ b/drivers/clk/mediatek/clk-gate.h
-@@ -36,6 +36,8 @@
+@@ -36,6 +36,8 @@ static inline struct mtk_clk_gate *to_mt
extern const struct clk_ops mtk_clk_gate_ops_setclr;
extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
+ mtk_apmixedsys_init);
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
-@@ -244,3 +244,28 @@
+@@ -244,3 +244,28 @@ void mtk_clk_register_composites(const s
clk_data->clks[mc->id] = clk;
}
}
+}
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
-@@ -121,7 +121,8 @@
+@@ -121,7 +121,8 @@ struct mtk_composite {
.flags = CLK_SET_RATE_PARENT, \
}
.id = _id, \
.parent = _parent, \
.name = _name, \
-@@ -156,8 +157,36 @@
+@@ -156,8 +157,36 @@ struct mtk_gate {
const struct clk_ops *ops;
};
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
-@@ -14,6 +14,10 @@
+@@ -14,6 +14,10 @@ config MACH_MT2701
bool "MediaTek MT2701 SoCs support"
default ARCH_MEDIATEK
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
-@@ -1000,6 +1000,8 @@
+@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
-@@ -29,6 +29,7 @@
+@@ -29,6 +29,7 @@ config MACH_MT6592
config MACH_MT7623
bool "MediaTek MT7623 SoCs support"
default ARCH_MEDIATEK
bool "MediaTek MT8127 SoCs support"
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
-@@ -301,4 +301,15 @@
+@@ -301,4 +301,15 @@ config VMD
To compile this driver as a module, choose M here: the
module will be called vmd.
endmenu
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
-@@ -33,3 +33,4 @@
+@@ -33,3 +33,4 @@ obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-arm
obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o
obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o
obj-$(CONFIG_VMD) += vmd.o
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
-@@ -1043,6 +1043,8 @@
+@@ -1043,6 +1043,8 @@ static void __init mtk_ethsys_init(struc
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
-@@ -233,7 +233,7 @@ unlock_out:
- clk_enable_unlock(flags);
+@@ -796,7 +796,7 @@ unlock_out:
+ clk_core_disable_unprepare(core->parent);
}
-static bool clk_ignore_unused;
#include <dt-bindings/clock/mt2701-clk.h>
-@@ -465,6 +466,10 @@
+@@ -465,6 +466,10 @@ static const char * const cpu_parents[]
"mmpll"
};
static const struct mtk_composite top_muxes[] __initconst = {
MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
0x0040, 0, 3, INVALID_MUX_GATE_BIT),
-@@ -677,6 +682,9 @@
+@@ -677,6 +682,9 @@ static void __init mtk_infrasys_init(str
mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs),
clk_data);
#include <dt-bindings/clock/mt8173-clk.h>
-@@ -525,6 +526,25 @@
+@@ -525,6 +526,25 @@ static const char * const i2s3_b_ck_pare
"apll2_div5"
};
static const struct mtk_composite top_muxes[] __initconst = {
/* CLK_CFG_0 */
MUX(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3),
-@@ -948,6 +968,9 @@
+@@ -948,6 +968,9 @@ static void __init mtk_infrasys_init(str
clk_data);
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
-@@ -81,6 +81,15 @@ config ARM_KIRKWOOD_CPUFREQ
+@@ -74,6 +74,15 @@ config ARM_KIRKWOOD_CPUFREQ
This adds the CPUFreq driver for Marvell Kirkwood
SoCs.
+ This adds the CPUFreq driver support for Mediatek MT7623 SoC.
+
config ARM_MT8173_CPUFREQ
- bool "Mediatek MT8173 CPUFreq support"
+ tristate "Mediatek MT8173 CPUFreq support"
depends on ARCH_MEDIATEK && REGULATOR
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
-@@ -57,6 +57,7 @@ obj-$(CONFIG_ARM_HISI_ACPU_CPUFREQ) += h
+@@ -58,6 +58,7 @@ obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += hi
obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o
obj-$(CONFIG_ARM_INTEGRATOR) += integrator-cpufreq.o
obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
+};*/
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
-@@ -282,6 +282,15 @@
+@@ -282,6 +282,15 @@ config PWM_MTK_DISP
To compile this driver as a module, choose M here: the module
will be called pwm-mtk-disp.
depends on ARCH_MXS && OF
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
-@@ -25,6 +25,7 @@
+@@ -25,6 +25,7 @@ obj-$(CONFIG_PWM_LPSS) += pwm-lpss.o
obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-pci.o
obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o
obj-$(CONFIG_PWM_MESON) += pwm-meson.o
static int mtk_msg_level = -1;
module_param_named(msg_level, mtk_msg_level, int, 0);
MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
-@@ -74,14 +77,14 @@
+@@ -74,14 +77,14 @@ static int mtk_mdio_busy_wait(struct mtk
return 0;
if (time_after(jiffies, t_start + PHY_IAC_TIMEOUT))
break;
u32 phy_register, u32 write_data)
{
if (mtk_mdio_busy_wait(eth))
-@@ -100,7 +103,7 @@
+@@ -100,7 +103,7 @@ static u32 _mtk_mdio_write(struct mtk_et
return 0;
}
{
u32 d;
-@@ -155,7 +158,7 @@
+@@ -155,7 +158,7 @@ static void mtk_gmac0_rgmii_adjust(struc
val = (speed == SPEED_1000) ?
RCK_CTRL_RGMII_1000 : RCK_CTRL_RGMII_10_100;
val = (speed == SPEED_1000) ?
TCK_CTRL_RGMII_1000 : TCK_CTRL_RGMII_10_100;
-@@ -1833,15 +1836,6 @@
+@@ -1833,15 +1836,6 @@ static int mtk_hw_init(struct mtk_eth *e
}
regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val);
/* GE1, Force 1000M/FD, FC ON */
mtk_w32(eth, MAC_MCR_FIXED_LINK, MTK_MAC_MCR(0));
-@@ -1851,6 +1845,8 @@
+@@ -1851,6 +1845,8 @@ static int mtk_hw_init(struct mtk_eth *e
/* Enable RX VLan Offloading */
mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
/* disable delay and normal interrupt */
mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
mtk_w32(eth, 0, MTK_PDMA_DELAY_INT);
-@@ -1879,6 +1875,8 @@
+@@ -1879,6 +1875,8 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
}
return 0;
}
-@@ -2379,6 +2377,9 @@
+@@ -2379,6 +2377,9 @@ static int mtk_probe(struct platform_dev
if (!eth)
return -ENOMEM;
#define DQSI0(x) ((x << 0) & GENMASK(6, 0))
#define DQSI1(x) ((x << 8) & GENMASK(14, 8))
#define RXCTL_DMWTLAT(x) ((x << 16) & GENMASK(18, 16))
-@@ -554,6 +554,9 @@
+@@ -554,6 +554,9 @@ struct mtk_eth {
struct mii_bus *mii_bus;
struct work_struct pending_work;
unsigned long state;
};
/* struct mtk_mac - the structure that holds the info about the MACs of the
-@@ -586,4 +589,6 @@
+@@ -586,4 +589,6 @@ void mtk_stats_update_mac(struct mtk_mac
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg);
u32 mtk_r32(struct mtk_eth *eth, unsigned reg);
--- a/drivers/mtd/nand/mtk_nand.c
+++ b/drivers/mtd/nand/mtk_nand.c
-@@ -1017,8 +1017,8 @@ static int mtk_nfc_ooblayout_free(struct
+@@ -1073,8 +1073,8 @@ static int mtk_nfc_ooblayout_free(struct
if (section >= eccsteps)
return -ERANGE;
return 0;
}
-@@ -1058,7 +1058,7 @@ static void mtk_nfc_set_fdm(struct mtk_n
+@@ -1114,7 +1114,7 @@ static void mtk_nfc_set_fdm(struct mtk_n
fdm->reg_size = NFI_FDM_MAX_SIZE;
/* bad block mark storage */
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -775,6 +775,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
+@@ -950,6 +950,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
mt7623-evb.dtb \
arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 1 +
3 files changed, 3 insertions(+)
-diff --git a/arch/arm/boot/dts/armada-385-linksys-caiman.dts b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-index f3cee91..a1b6e68 100644
--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
@@ -315,6 +315,7 @@
};
};
};
-diff --git a/arch/arm/boot/dts/armada-385-linksys-cobra.dts b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-index 1110718..a1a75af 100644
--- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
@@ -315,6 +315,7 @@
};
};
};
-diff --git a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-index 42ea876..3744ba3 100644
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -266,6 +266,7 @@
};
usb2@5 {
---
-2.9.3
-
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -298,7 +298,6 @@
+@@ -299,7 +299,6 @@
nand@d0000 {
status = "okay";
num-cs = <1>;
/* USB part of the eSATA/USB 2.0 port */
usb@50000 {
status = "okay";
-@@ -367,6 +378,10 @@
+@@ -368,6 +379,10 @@
};
};
};
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -416,13 +416,11 @@
+@@ -417,13 +417,11 @@
};
};