x86: crownbay: Add MP initialization
authorBin Meng <bmeng.cn@gmail.com>
Wed, 17 Jun 2015 03:15:39 +0000 (11:15 +0800)
committerSimon Glass <sjg@chromium.org>
Wed, 15 Jul 2015 00:03:16 +0000 (18:03 -0600)
Intel Crown Bay board has a TunnelCreek processor which supports
hyper-threading. Add /cpus node in the crownbay.dts and enable
the MP initialization.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(modified to remove error:
   overriding the value of OF_CONTROL. Old value: "y", new value: "y")

arch/x86/dts/crownbay.dts
configs/crownbay_defconfig

index d68efda8dfd1b81f2473eac3cd3b077dccfa5a7e..1ec90cda184f6e5e38e803339a7448deb7449962 100644 (file)
                silent_console = <0>;
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "cpu-x86";
+                       reg = <0>;
+                       intel,apic-id = <0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "cpu-x86";
+                       reg = <1>;
+                       intel,apic-id = <1>;
+               };
+
+       };
+
        gpioa {
                compatible = "intel,ich6-gpio";
                u-boot,dm-pre-reloc;
index f3fb206b0e206c313c3c571ce0a885a0ba2f5764..93f921638d2262bdd0c1d3fd24b73e96f5ee46e1 100644 (file)
@@ -2,7 +2,10 @@ CONFIG_X86=y
 CONFIG_VENDOR_INTEL=y
 CONFIG_DEFAULT_DEVICE_TREE="crownbay"
 CONFIG_TARGET_CROWNBAY=y
+CONFIG_SMP=y
+CONFIG_MAX_CPUS=2
 CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_CMD_CPU=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_SETEXPR is not set
@@ -11,6 +14,7 @@ CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_OF_CONTROL=y
+CONFIG_CPU=y
 CONFIG_SPI_FLASH=y
 CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_VSNPRINTF=y