* interrupt controller reports a spurious interrupt then
* return to where we came from.
*/
- bl ic_get_pending_interrupt_type
+ bl plat_ic_get_pending_interrupt_type
cmp x0, #INTR_TYPE_INVAL
b.eq interrupt_exit_\label
* Read the id of the highest priority pending interrupt. If
* no interrupt is asserted then return to where we came from.
*/
- bl ic_get_pending_interrupt_id
+ bl plat_ic_get_pending_interrupt_id
cmp x0, #INTR_ID_UNAVAILABLE
b.eq interrupt_exit_\label
#endif
bl31_next_el_arch_setup(image_type);
/* Program EL3 registers to enable entry into the next EL */
- next_image_info = bl31_get_next_image_info(image_type);
+ next_image_info = bl31_plat_get_next_image_ep_info(image_type);
assert(next_image_info);
scr = read_scr();
* secure physical generic timer interrupt in which case, handle it.
* Otherwise throw this interrupt at the EL3 firmware.
*/
- id = ic_get_pending_interrupt_id();
+ id = plat_ic_get_pending_interrupt_id();
/* TSP can only handle the secure physical timer interrupt */
if (id != IRQ_SEC_PHY_TIMER)
* Handle the interrupt. Also sanity check if it has been preempted by
* another secure interrupt through an assertion.
*/
- id = ic_acknowledge_interrupt();
+ id = plat_ic_acknowledge_interrupt();
assert(id == IRQ_SEC_PHY_TIMER);
tsp_generic_timer_handler();
- ic_end_of_interrupt(id);
+ plat_ic_end_of_interrupt(id);
/* Update the statistics and print some messages */
tsp_stats[linear_id].fiq_count++;
#include <stdint.h>
-/******************************************
- * Forward declarations
- *****************************************/
-struct entry_point_info;
-
/*******************************************************************************
* Function prototypes
******************************************************************************/
void bl31_set_next_image_type(uint32_t type);
uint32_t bl31_get_next_image_type(void);
void bl31_prepare_next_image_entry();
-struct entry_point_info *bl31_get_next_image_info(uint32_t type);
void bl31_register_bl32_init(int32_t (*)(void));
#endif /* __BL31_H__ */
/*******************************************************************************
* Mandatory interrupt management functions
******************************************************************************/
-uint32_t ic_get_pending_interrupt_id(void);
-uint32_t ic_get_pending_interrupt_type(void);
-uint32_t ic_acknowledge_interrupt(void);
-uint32_t ic_get_interrupt_type(uint32_t id);
-void ic_end_of_interrupt(uint32_t id);
+uint32_t plat_ic_get_pending_interrupt_id(void);
+uint32_t plat_ic_get_pending_interrupt_type(void);
+uint32_t plat_ic_acknowledge_interrupt(void);
+uint32_t plat_ic_get_interrupt_type(uint32_t id);
+void plat_ic_end_of_interrupt(uint32_t id);
uint32_t plat_interrupt_type_to_line(uint32_t type,
uint32_t security_state);
void *plat_params_from_bl2);
void bl31_plat_arch_setup(void);
void bl31_platform_setup(void);
-struct entry_point_info *bl31_get_next_image_info(uint32_t type);
+struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
/*******************************************************************************
* Mandatory PSCI functions (BL3-1)
* while BL32 corresponds to the secure image type. A NULL pointer is returned
* if the image does not exist.
******************************************************************************/
-entry_point_info_t *bl31_get_next_image_info(uint32_t type)
+entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
{
entry_point_info_t *next_image_info;
* the GIC cpu interface. INTR_TYPE_INVAL is returned when there is no
* interrupt pending.
******************************************************************************/
-uint32_t ic_get_pending_interrupt_type()
+uint32_t plat_ic_get_pending_interrupt_type()
{
uint32_t id, gicc_base;
* the GIC cpu interface. INTR_ID_UNAVAILABLE is returned when there is no
* interrupt pending.
******************************************************************************/
-uint32_t ic_get_pending_interrupt_id()
+uint32_t plat_ic_get_pending_interrupt_id()
{
uint32_t id, gicc_base;
* This functions reads the GIC cpu interface Interrupt Acknowledge register
* to start handling the pending interrupt. It returns the contents of the IAR.
******************************************************************************/
-uint32_t ic_acknowledge_interrupt()
+uint32_t plat_ic_acknowledge_interrupt()
{
return gicc_read_IAR(fvp_get_cfgvar(CONFIG_GICC_ADDR));
}
* This functions writes the GIC cpu interface End Of Interrupt register with
* the passed value to finish handling the active interrupt
******************************************************************************/
-void ic_end_of_interrupt(uint32_t id)
+void plat_ic_end_of_interrupt(uint32_t id)
{
gicc_write_EOIR(fvp_get_cfgvar(CONFIG_GICC_ADDR), id);
return;
* this interrupt has been configured under by the interrupt controller i.e.
* group0 or group1.
******************************************************************************/
-uint32_t ic_get_interrupt_type(uint32_t id)
+uint32_t plat_ic_get_interrupt_type(uint32_t id)
{
uint32_t group;
* absence is a critical failure. TODO: Add support to
* conditionally include the SPD service
*/
- image_info = bl31_get_next_image_info(SECURE);
+ image_info = bl31_plat_get_next_image_ep_info(SECURE);
assert(image_info);
/*