--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca956x.dtsi"
+
+/ {
+ model = "Phicomm K2T";
+ compatible = "phicomm,k2t";
+
+ aliases {
+ led-status = &status_red;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status_blue {
+ label = "phicomm:blue:status";
+ gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ status_red: status_red {
+ label = "phicomm:red:status";
+ gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ status_yellow {
+ label = "phicomm:yellow:status";
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+&spi {
+ num-cs = <1>;
+
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "config";
+ reg = <0x030000 0x10000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "permanent";
+ reg = <0x040000 0x50000>;
+ read-only;
+ };
+
+ partition@90000 {
+ label = "firmware";
+ reg = <0x090000 0xf60000>;
+ };
+
+ art: partition@ff0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy-mask = <0>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "sgmii";
+
+ qca,ar8327-initvals = <
+ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
+ 0x10 0x81000080 /* POWER_ON_STRIP */
+ 0x50 0xcc35cc35 /* LED_CTRL0 */
+ 0x54 0xcb37cb37 /* LED_CTRL1 */
+ 0x58 0x00000000 /* LED_CTRL2 */
+ 0x5c 0x00f3cf00 /* LED_CTRL3 */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+};
+
+ð0 {
+ status = "okay";
+
+ pll-data = <0x03000101 0x00000101 0x00001919>;
+
+ phy-mode = "sgmii";
+ phy-handle = <&phy0>;
+};
+
+&wmac {
+ status = "okay";
+ mtd-cal-data = <&art 0x1000>;
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include <dt-bindings/clock/ath79-clk.h>
+#include "ath79.dtsi"
+
+/ {
+ compatible = "qca,qca9560";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips74Kc";
+ clocks = <&pll ATH79_CLK_CPU>;
+ reg = <0>;
+ };
+ };
+
+ extosc: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ref";
+ clock-frequency = <25000000>;
+ };
+
+ ahb {
+ apb {
+ ddr_ctrl: memory-controller@18000000 {
+ compatible = "qca,qca9560-ddr-controller",
+ "qca,ar7240-ddr-controller";
+ reg = <0x18000000 0x100>;
+
+ #qca,ddr-wb-channel-cells = <1>;
+ };
+
+ uart: uart@18020000 {
+ compatible = "ns16550a";
+ reg = <0x18020000 0x20>;
+
+ interrupts = <3>;
+
+ clocks = <&pll ATH79_CLK_REF>;
+ clock-names = "uart";
+
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio: gpio@18040000 {
+ compatible = "qca,qca9560-gpio",
+ "qca,ar9340-gpio";
+ reg = <0x18040000 0x28>;
+
+ interrupts = <2>;
+ ngpios = <24>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pinmux: pinmux@1804002c {
+ compatible = "pinctrl-single";
+
+ reg = <0x1804002c 0x40>;
+
+ #size-cells = <0>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ jtag_disable_pins: pinmux_jtag_disable_pins {
+ pinctrl-single,bits = <0x40 0x2 0x2>;
+ };
+ };
+
+ pll: pll-controller@18050000 {
+ compatible = "qca,qca9560-pll", "syscon";
+ reg = <0x18050000 0x50>;
+
+ #clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
+
+ clocks = <&extosc>;
+ };
+
+ wdt: wdt@18060008 {
+ compatible = "qca,ar7130-wdt";
+ reg = <0x18060008 0x8>;
+
+ interrupts = <4>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "wdt";
+ };
+
+ rst: reset-controller@1806001c {
+ compatible = "qca,qca9560-reset",
+ "qca,ar7100-reset",
+ "simple-bus";
+ reg = <0x1806001c 0x4>;
+
+ #reset-cells = <1>;
+ interrupt-parent = <&cpuintc>;
+
+ intc3: interrupt-controller@3 {
+ compatible = "qcom,qca9556-intc";
+
+ interrupts = <3>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ qcom,pending-bits = <0x1f000>, /* pcie rc */
+ <0x1000000>, /* usb1 */
+ <0x10000000>; /* usb2 */
+ };
+ };
+
+ rst2: reset-controller@180600c0 {
+ compatible = "qca,qca9560-reset",
+ "qca,ar7100-reset",
+ "simple-bus";
+ reg = <0x180600c0 0x4>;
+
+ #reset-cells = <1>;
+ };
+
+ wmac: wmac@18100000 {
+ compatible = "qca,qca9560-wmac";
+ reg = <0x18100000 0x10000>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ status = "disabled";
+ };
+
+ pcie: pcie-controller@18250000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x18250000 0x1000>, /* CRP */
+ <0x18280000 0x100>, /* CTRL */
+ <0x16000000 0x1000>; /* CFG */
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
+ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
+ interrupt-parent = <&intc3>;
+ interrupts = <0>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie 0>;
+ status = "disabled";
+ };
+ };
+
+ usb0: usb@1b000000 {
+ compatible = "generic-ehci";
+ reg = <0x1b000000 0x1d8>;
+
+ interrupt-parent = <&intc3>;
+ interrupts = <1>;
+
+ resets = <&rst 5>;
+ reset-names = "usb-host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy0";
+ phys = <&usb_phy0>;
+
+ status = "disabled";
+ };
+
+ usb1: usb@1b400000 {
+ compatible = "generic-ehci";
+ reg = <0x1b400000 0x1d8>;
+
+ interrupt-parent = <&intc3>;
+ interrupts = <2>;
+
+ resets = <&rst2 5>;
+ reset-names = "usb-host";
+
+ has-transaction-translator;
+ caps-offset = <0x100>;
+
+ phy-names = "usb-phy1";
+ phys = <&usb_phy1>;
+
+ status = "disabled";
+ };
+
+ spi: spi@1f000000 {
+ compatible = "qca,qca9560-spi", "qca,ar7100-spi";
+ reg = <0x1f000000 0x10>;
+
+ clocks = <&pll ATH79_CLK_AHB>;
+ clock-names = "ahb";
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ usb_phy0: usb-phy {
+ compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst 4>, <&rst 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ usb_phy1: usb-phy {
+ compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
+
+ reset-names = "usb-phy", "usb-suspend-override";
+ resets = <&rst2 4>, <&rst2 3>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+};
+
+&mdio0 {
+ resets = <&rst 22>;
+ reset-names = "mdio";
+};
+
+ð0 {
+ compatible = "qca,qca9560-eth", "syscon";
+
+ pll-data = <0x03000000 0x00000101 0x00001919>;
+ pll-reg = <0 0x48 0>;
+ pll-handle = <&pll>;
+
+ phy-mode = "sgmii";
+
+ resets = <&rst 9>;
+ reset-names = "mac";
+};
+
+&mdio1 {
+ resets = <&rst 23>;
+ reset-names = "mdio";
+ builtin-switch;
+};
+
+ð1 {
+ compatible = "qca,qca9560-eth", "syscon";
+
+ phy-mode = "gmii";
+
+ resets = <&rst 13>;
+ reset-names = "mac";
+
+ status = "disabled";
+};
projects / openwrt / staging / rmilecki.git / commitdiff