Refresh all patches on top of kernel 5.10.138.
The following patches were applied upstream:
bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch
bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch
bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch
bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch
bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch
bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch
bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch
bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch
bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch
bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch
bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch
bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch
bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch
bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch
bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch
bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch
Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more.
bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch
Fixes: 89956c653252 ("kernel: bump 5.10 to 5.10.138")
Fixes: 4209c33ae27d ("kernel: bump 5.10 to 5.10.137")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
-@@ -90,12 +90,18 @@ static int parse_redboot_partitions(stru
+@@ -91,12 +91,18 @@ static int parse_redboot_partitions(stru
parse_redboot_of(master);
return -EIO;
}
offset -= master->erasesize;
-@@ -108,10 +114,6 @@ static int parse_redboot_partitions(stru
+@@ -109,10 +115,6 @@ static int parse_redboot_partitions(stru
goto nogood;
}
}
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
master->name, offset);
-@@ -184,6 +186,11 @@ static int parse_redboot_partitions(stru
+@@ -185,6 +187,11 @@ static int parse_redboot_partitions(stru
}
if (i == numslots) {
/* Didn't find it */
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -1839,7 +1843,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1838,7 +1842,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(skb);
skb_trim(skb, skb->len - 4); /* remove fcs */
return 1;
}
-@@ -1857,7 +1862,8 @@ static int smsc95xx_rx_fixup(struct usbn
+@@ -1856,7 +1861,8 @@ static int smsc95xx_rx_fixup(struct usbn
if (dev->net->features & NETIF_F_RXCSUM)
smsc95xx_rx_csum_offload(ax_skb);
skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -917,13 +921,13 @@ static int smsc95xx_reset(struct usbnet
+@@ -915,13 +919,13 @@ static int smsc95xx_reset(struct usbnet
if (!turbo_mode) {
burst_cap = 0;
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
u32 *data, int in_pm)
{
-@@ -773,6 +778,53 @@ static int smsc95xx_ioctl(struct net_dev
+@@ -771,6 +776,53 @@ static int smsc95xx_ioctl(struct net_dev
return phy_mii_ioctl(netdev->phydev, rq, cmd);
}
static void smsc95xx_init_mac_address(struct usbnet *dev)
{
/* maybe the boot loader passed the MAC address in devicetree */
-@@ -795,6 +847,10 @@ static void smsc95xx_init_mac_address(st
+@@ -793,6 +845,10 @@ static void smsc95xx_init_mac_address(st
}
}
--- a/arch/arm64/kernel/armv8_deprecated.c
+++ b/arch/arm64/kernel/armv8_deprecated.c
-@@ -182,10 +182,15 @@ static void __init register_insn_emulati
+@@ -183,10 +183,15 @@ static void __init register_insn_emulati
switch (ops->status) {
case INSN_DEPRECATED:
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
-@@ -1966,6 +1966,16 @@ reset:
+@@ -1969,6 +1969,16 @@ reset:
return ret;
}
extern int usb_driver_set_configuration(struct usb_device *udev, int config);
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
-@@ -384,6 +384,11 @@ struct hc_driver {
+@@ -385,6 +385,11 @@ struct hc_driver {
* or bandwidth constraints.
*/
void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *);
/* Returns the hardware-chosen device address */
int (*address_device)(struct usb_hcd *, struct usb_device *udev);
/* prepares the hardware to send commands to the device */
-@@ -445,6 +450,8 @@ extern void usb_hcd_unmap_urb_setup_for_
+@@ -446,6 +451,8 @@ extern void usb_hcd_unmap_urb_setup_for_
extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *);
extern void usb_hcd_flush_endpoint(struct usb_device *udev,
struct usb_host_endpoint *ep);
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
-@@ -1271,6 +1274,9 @@
+@@ -1273,6 +1276,9 @@
#define USB_VENDOR_ID_XAT 0x2505
#define USB_DEVICE_ID_XAT_CSR 0x0220
--- a/Makefile
+++ b/Makefile
-@@ -1363,6 +1363,9 @@ ifneq ($(dtstree),)
+@@ -1364,6 +1364,9 @@ ifneq ($(dtstree),)
%.dtb: include/config/kernel.release scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
--- a/Makefile
+++ b/Makefile
-@@ -1363,7 +1363,7 @@ ifneq ($(dtstree),)
+@@ -1364,7 +1364,7 @@ ifneq ($(dtstree),)
%.dtb: include/config/kernel.release scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1493,9 +1493,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1487,9 +1487,6 @@ static int vc4_hdmi_cec_init(struct vc4_
u32 value;
int ret;
vc4_hdmi->cec_adap = cec_allocate_adapter(&vc4_hdmi_cec_adap_ops,
vc4_hdmi, "vc4",
CEC_CAP_DEFAULTS |
-@@ -1928,7 +1925,6 @@ static const struct vc4_hdmi_variant bcm
+@@ -1922,7 +1919,6 @@ static const struct vc4_hdmi_variant bcm
.debugfs_name = "hdmi_regs",
.card_name = "vc4-hdmi",
.max_pixel_clock = 162000000,
+++ /dev/null
-From d57ee5afedf0b1b9a9afb29357c484acda5a40af Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Tue, 19 May 2020 14:54:28 +0100
-Subject: [PATCH] drm/vc4: Adopt the dma configuration from the HVS or
- V3D component
-
-vc4_drv isn't necessarily under the /soc node in DT as it is a
-virtual device, but it is the one that does the allocations.
-The DMA addresses are consumed by primarily the HVS or V3D, and
-those require VideoCore cache alias address mapping, and so will be
-under /soc.
-
-During probe find the a suitable device node for HVS or V3D,
-and adopt the DMA configuration of that node.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_drv.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -246,6 +246,14 @@ static void vc4_match_add_drivers(struct
- }
- }
-
-+const struct of_device_id vc4_dma_range_matches[] = {
-+ { .compatible = "brcm,bcm2835-hvs" },
-+ { .compatible = "brcm,bcm2835-v3d" },
-+ { .compatible = "brcm,cygnus-v3d" },
-+ { .compatible = "brcm,vc4-v3d" },
-+ {}
-+};
-+
- static int vc4_drm_bind(struct device *dev)
- {
- struct platform_device *pdev = to_platform_device(dev);
-@@ -263,6 +271,16 @@ static int vc4_drm_bind(struct device *d
- vc4_drm_driver.driver_features &= ~DRIVER_RENDER;
- of_node_put(node);
-
-+ node = of_find_matching_node_and_match(NULL, vc4_dma_range_matches,
-+ NULL);
-+ if (node) {
-+ ret = of_dma_configure(dev, node, true);
-+ of_node_put(node);
-+
-+ if (ret)
-+ return ret;
-+ }
-+
- vc4 = devm_drm_dev_alloc(dev, &vc4_drm_driver, struct vc4_dev, base);
- if (IS_ERR(vc4))
- return PTR_ERR(vc4);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -991,6 +991,44 @@ static void vc4_hdmi_audio_shutdown(stru
+@@ -995,6 +995,44 @@ static void vc4_hdmi_audio_shutdown(stru
vc4_hdmi->audio.substream = NULL;
}
/* HDMI audio codec callbacks */
static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
-@@ -1001,6 +1039,8 @@ static int vc4_hdmi_audio_hw_params(stru
+@@ -1005,6 +1043,8 @@ static int vc4_hdmi_audio_hw_params(stru
struct device *dev = &vc4_hdmi->pdev->dev;
u32 audio_packet_config, channel_mask;
u32 channel_map;
if (substream != vc4_hdmi->audio.substream)
return -EINVAL;
-@@ -1021,6 +1061,14 @@ static int vc4_hdmi_audio_hw_params(stru
+@@ -1025,6 +1065,14 @@ static int vc4_hdmi_audio_hw_params(stru
vc4_hdmi_audio_set_mai_clock(vc4_hdmi);
#include <sound/dmaengine_pcm.h>
#include <sound/pcm_drm_eld.h>
#include <sound/pcm_params.h>
-@@ -1182,6 +1183,47 @@ static int vc4_hdmi_audio_eld_ctl_get(st
+@@ -1176,6 +1177,47 @@ static int vc4_hdmi_audio_eld_ctl_get(st
return 0;
}
static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = {
{
.access = SNDRV_CTL_ELEM_ACCESS_READ |
-@@ -1191,6 +1233,19 @@ static const struct snd_kcontrol_new vc4
+@@ -1185,6 +1227,19 @@ static const struct snd_kcontrol_new vc4
.info = vc4_hdmi_audio_eld_ctl_info,
.get = vc4_hdmi_audio_eld_ctl_get,
},
};
static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = {
-@@ -1311,6 +1366,11 @@ static int vc4_hdmi_audio_init(struct vc
+@@ -1305,6 +1360,11 @@ static int vc4_hdmi_audio_init(struct vc
vc4_hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
vc4_hdmi->audio.dma_data.maxburst = 2;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1031,9 +1031,8 @@ static int sample_rate_to_mai_fmt(int sa
+@@ -1035,9 +1035,8 @@ static int sample_rate_to_mai_fmt(int sa
}
/* HDMI audio codec callbacks */
{
struct vc4_hdmi *vc4_hdmi = dai_to_hdmi(dai);
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
-@@ -1046,12 +1045,15 @@ static int vc4_hdmi_audio_hw_params(stru
+@@ -1050,12 +1049,15 @@ static int vc4_hdmi_audio_hw_params(stru
if (substream != vc4_hdmi->audio.substream)
return -EINVAL;
HDMI_WRITE(HDMI_MAI_CTL,
VC4_HD_MAI_CTL_RESET |
-@@ -1273,7 +1275,7 @@ static const struct snd_soc_component_dr
+@@ -1267,7 +1269,7 @@ static const struct snd_soc_component_dr
static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = {
.startup = vc4_hdmi_audio_startup,
.shutdown = vc4_hdmi_audio_shutdown,
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1065,7 +1065,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1069,7 +1069,11 @@ static int vc4_hdmi_audio_prepare(struct
vc4_hdmi_audio_set_mai_clock(vc4_hdmi);
mai_sample_rate = sample_rate_to_mai_fmt(vc4_hdmi->audio.samplerate);
+++ /dev/null
-From 3c398513990aa0edc5b9ebfbdd2395623562c6e4 Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Thu, 25 Jun 2020 18:48:40 +0100
-Subject: [PATCH] vc4_hdmi: Remove firmware logic for MAI threshold
- setting
-
-This was a workaround for bugs in hardware on earlier Pi models
-and wasn't totally successful.
-
-It makes audio quality worse on a Pi4 at the higher sample rates
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 22 ++++++----------------
- 1 file changed, 6 insertions(+), 16 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1086,22 +1086,12 @@ static int vc4_hdmi_audio_prepare(struct
- audio_packet_config |= VC4_SET_FIELD(channel_mask,
- VC4_HDMI_AUDIO_PACKET_CEA_MASK);
-
-- /* Set the MAI threshold. This logic mimics the firmware's. */
-- if (vc4_hdmi->audio.samplerate > 96000) {
-- HDMI_WRITE(HDMI_MAI_THR,
-- VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) |
-- VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
-- } else if (vc4_hdmi->audio.samplerate > 48000) {
-- HDMI_WRITE(HDMI_MAI_THR,
-- VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) |
-- VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
-- } else {
-- HDMI_WRITE(HDMI_MAI_THR,
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
-- }
-+ /* Set the MAI threshold */
-+ HDMI_WRITE(HDMI_MAI_THR,
-+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
-
- HDMI_WRITE(HDMI_MAI_CONFIG,
- VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1095,6 +1095,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1099,6 +1099,7 @@ static int vc4_hdmi_audio_prepare(struct
HDMI_WRITE(HDMI_MAI_CONFIG,
VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
};
static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
-@@ -769,27 +776,33 @@ static int vc4_plane_mode_set(struct drm
+@@ -765,27 +772,33 @@ static int vc4_plane_mode_set(struct drm
uint32_t param = fourcc_mod_broadcom_param(fb->modifier);
u32 tile_w, tile, x_off, pix_per_tile;
return -EINVAL;
}
-@@ -799,6 +812,13 @@ static int vc4_plane_mode_set(struct drm
+@@ -795,6 +808,13 @@ static int vc4_plane_mode_set(struct drm
/* Adjust the base pointer to the first pixel to be scanned
* out.
*/
for (i = 0; i < num_planes; i++) {
vc4_state->offsets[i] += param * tile_w * tile;
-@@ -960,7 +980,8 @@ static int vc4_plane_mode_set(struct drm
+@@ -956,7 +976,8 @@ static int vc4_plane_mode_set(struct drm
/* Pitch word 1/2 */
for (i = 1; i < num_planes; i++) {
vc4_dlist_write(vc4_state,
VC4_SET_FIELD(fb->pitches[i],
SCALER_SRC_PITCH));
-@@ -1320,6 +1341,13 @@ static bool vc4_format_mod_supported(str
+@@ -1316,6 +1337,13 @@ static bool vc4_format_mod_supported(str
default:
return false;
}
case DRM_FORMAT_RGBX1010102:
case DRM_FORMAT_BGRX1010102:
case DRM_FORMAT_RGBA1010102:
-@@ -1352,8 +1380,11 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1348,8 +1376,11 @@ struct drm_plane *vc4_plane_init(struct
struct drm_plane *plane = NULL;
struct vc4_plane *vc4_plane;
u32 formats[ARRAY_SIZE(hvs_formats)];
static const uint64_t modifiers[] = {
DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
DRM_FORMAT_MOD_BROADCOM_SAND128,
-@@ -1368,13 +1399,17 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1364,13 +1395,17 @@ struct drm_plane *vc4_plane_init(struct
if (!vc4_plane)
return ERR_PTR(-ENOMEM);
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -628,6 +628,53 @@ static int vc4_plane_allocate_lbm(struct
+@@ -624,6 +624,53 @@ static int vc4_plane_allocate_lbm(struct
return 0;
}
/* Writes out a full display list for an active plane to the plane's
* private dlist state.
*/
-@@ -992,9 +1039,20 @@ static int vc4_plane_mode_set(struct drm
+@@ -988,9 +1035,20 @@ static int vc4_plane_mode_set(struct drm
/* Colorspace conversion words */
if (vc4_state->is_yuv) {
}
vc4_state->lbm_offset = 0;
-@@ -1423,6 +1481,14 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1419,6 +1477,14 @@ struct drm_plane *vc4_plane_init(struct
DRM_MODE_REFLECT_X |
DRM_MODE_REFLECT_Y);
vc4_hdmi.o \
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -307,9 +307,11 @@ static int vc4_drm_bind(struct device *d
+@@ -308,9 +308,11 @@ static int vc4_drm_bind(struct device *d
if (ret)
return ret;
drm_fb_helper_remove_conflicting_framebuffers(NULL, "vc4drmfb", false);
-@@ -317,8 +319,10 @@ static int vc4_drm_bind(struct device *d
+@@ -318,8 +320,10 @@ static int vc4_drm_bind(struct device *d
if (ret < 0)
goto unbind_all;
ret = drm_dev_register(drm, 0);
if (ret < 0)
-@@ -356,6 +360,7 @@ static struct platform_driver *const com
+@@ -357,6 +361,7 @@ static struct platform_driver *const com
&vc4_hvs_driver,
&vc4_txp_driver,
&vc4_crtc_driver,
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -74,12 +74,17 @@ struct vc4_perfmon {
+@@ -74,11 +74,16 @@ struct vc4_perfmon {
struct vc4_dev {
struct drm_device base;
struct vc4_hvs *hvs;
struct vc4_v3d *v3d;
struct vc4_dpi *dpi;
- struct vc4_dsi *dsi1;
struct vc4_vec *vec;
struct vc4_txp *txp;
+ struct vc4_fkms *fkms;
struct vc4_hang_state *hang_state;
-@@ -877,6 +882,9 @@ extern struct platform_driver vc4_dsi_dr
+@@ -876,6 +881,9 @@ extern struct platform_driver vc4_dsi_dr
/* vc4_fence.c */
extern const struct dma_fence_ops vc4_fence_ops;
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -248,6 +248,7 @@ static void vc4_match_add_drivers(struct
-
- const struct of_device_id vc4_dma_range_matches[] = {
+@@ -249,6 +249,7 @@ static void vc4_match_add_drivers(struct
+ static const struct of_device_id vc4_dma_range_matches[] = {
+ { .compatible = "brcm,bcm2711-hvs" },
{ .compatible = "brcm,bcm2835-hvs" },
+ { .compatible = "raspberrypi,rpi-firmware-kms" },
{ .compatible = "brcm,bcm2835-v3d" },
+++ /dev/null
-From 4de61df3c777ea6265d03be98b315c8644003ceb Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 31 Jul 2019 17:36:34 +0100
-Subject: [PATCH] drm/vc4: A present but empty dmas disables audio
-
-Overlays are unable to remove properties in the base DTB, but they
-can overwrite them. Allow a present but empty 'dmas' property
-to also disable the HDMI audio interface.
-
-See: https://github.com/raspberrypi/linux/issues/2489
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1333,10 +1333,12 @@ static int vc4_hdmi_audio_init(struct vc
- const __be32 *addr;
- int index;
- int ret;
-+ int len;
-
-- if (!of_find_property(dev->of_node, "dmas", NULL)) {
-+ if (!of_find_property(dev->of_node, "dmas", &len) ||
-+ len == 0) {
- dev_warn(dev,
-- "'dmas' DT property is missing, no HDMI audio\n");
-+ "'dmas' DT property is missing or empty, no HDMI audio\n");
- return 0;
- }
-
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -92,6 +92,12 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -94,6 +94,12 @@ static int vc4_hdmi_debugfs_regs(struct
drm_print_regset32(&p, &vc4_hdmi->hdmi_regset);
drm_print_regset32(&p, &vc4_hdmi->hd_regset);
return 0;
}
-@@ -1734,6 +1740,7 @@ static int vc5_hdmi_init_resources(struc
+@@ -1736,6 +1742,7 @@ static int vc5_hdmi_init_resources(struc
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi");
if (!res)
-@@ -1824,6 +1831,38 @@ static int vc5_hdmi_init_resources(struc
+@@ -1826,6 +1833,38 @@ static int vc5_hdmi_init_resources(struc
return PTR_ERR(vc4_hdmi->reset);
}
+++ /dev/null
-From 2b8894c7231f02a03e13c1785ed706471d511f8d Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 26 Oct 2020 12:38:27 +0000
-Subject: [PATCH] drm/vc4: Add the 2711 HVS as a suitable DMA node
-
-With vc4-drv node not being under /soc on Pi4, we need to
-adopt the correct DMA parameters from a suitable sub-component.
-Add "brcm,bcm2711-hvs" to that list of components.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_drv.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -248,6 +248,7 @@ static void vc4_match_add_drivers(struct
-
- const struct of_device_id vc4_dma_range_matches[] = {
- { .compatible = "brcm,bcm2835-hvs" },
-+ { .compatible = "brcm,bcm2711-hvs" },
- { .compatible = "raspberrypi,rpi-firmware-kms" },
- { .compatible = "brcm,bcm2835-v3d" },
- { .compatible = "brcm,cygnus-v3d" },
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -257,6 +257,7 @@ static int vc4_hdmi_connector_init(struc
+@@ -261,6 +261,7 @@ static int vc4_hdmi_connector_init(struc
connector->interlace_allowed = 1;
connector->doublescan_allowed = 0;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -285,9 +285,11 @@ static void vc4_hdmi_write_infoframe(str
+@@ -289,9 +289,11 @@ static void vc4_hdmi_write_infoframe(str
const struct vc4_hdmi_register *ram_packet_start =
&vc4_hdmi->variant->registers[HDMI_RAM_PACKET_START];
u32 packet_reg = ram_packet_start->offset + VC4_HDMI_PACKET_STRIDE * packet_id;
ssize_t len, i;
int ret;
-@@ -320,6 +322,13 @@ static void vc4_hdmi_write_infoframe(str
+@@ -324,6 +326,13 @@ static void vc4_hdmi_write_infoframe(str
packet_reg += 4;
}
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -306,11 +306,11 @@
+@@ -348,11 +348,11 @@
# define DSI0_PHY_AFEC0_RESET BIT(11)
# define DSI1_PHY_AFEC0_PD_BG BIT(11)
# define DSI0_PHY_AFEC0_PD BIT(10)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -489,8 +489,10 @@ int vc4_crtc_disable_at_boot(struct drm_
+@@ -491,8 +491,10 @@ int vc4_crtc_disable_at_boot(struct drm_
}
static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state);
struct drm_device *dev = crtc->dev;
-@@ -516,8 +518,10 @@ static void vc4_crtc_atomic_disable(stru
+@@ -518,8 +520,10 @@ static void vc4_crtc_atomic_disable(stru
}
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
}
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -601,18 +601,21 @@ void vc4_crtc_get_margins(struct drm_crt
+@@ -603,18 +603,21 @@ void vc4_crtc_get_margins(struct drm_crt
}
static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -928,7 +928,8 @@ int vc4_hvs_get_fifo_from_output(struct
+@@ -927,7 +927,8 @@ int vc4_hvs_get_fifo_from_output(struct
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -520,8 +520,6 @@ static void vc4_crtc_atomic_disable(stru
+@@ -522,8 +522,6 @@ static void vc4_crtc_atomic_disable(stru
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *state)
{
struct drm_device *dev = crtc->dev;
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
-@@ -534,7 +532,7 @@ static void vc4_crtc_atomic_enable(struc
+@@ -536,7 +534,7 @@ static void vc4_crtc_atomic_enable(struc
*/
drm_crtc_vblank_on(crtc);
vc4_encoder->pre_crtc_configure(encoder);
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -926,8 +926,8 @@ extern struct platform_driver vc4_hvs_dr
+@@ -925,8 +925,8 @@ extern struct platform_driver vc4_hvs_dr
void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int output);
int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output);
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -420,7 +420,9 @@ static void require_hvs_enabled(struct d
+@@ -422,7 +422,9 @@ static void require_hvs_enabled(struct d
SCALER_DISPCTRL_ENABLE);
}
{
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
-@@ -452,13 +454,13 @@ static int vc4_crtc_disable(struct drm_c
+@@ -454,13 +456,13 @@ static int vc4_crtc_disable(struct drm_c
mdelay(20);
if (vc4_encoder && vc4_encoder->post_crtc_disable)
return 0;
}
-@@ -485,7 +487,7 @@ int vc4_crtc_disable_at_boot(struct drm_
+@@ -487,7 +489,7 @@ int vc4_crtc_disable_at_boot(struct drm_
if (channel < 0)
return 0;
}
static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
-@@ -501,7 +503,7 @@ static void vc4_crtc_atomic_disable(stru
+@@ -503,7 +505,7 @@ static void vc4_crtc_atomic_disable(stru
/* Disable vblank irq handling before crtc is disabled. */
drm_crtc_vblank_off(crtc);
/*
* Make sure we issue a vblank event after disabling the CRTC if
-@@ -535,14 +537,14 @@ static void vc4_crtc_atomic_enable(struc
+@@ -537,14 +539,14 @@ static void vc4_crtc_atomic_enable(struc
vc4_hvs_atomic_enable(crtc, state);
if (vc4_encoder->pre_crtc_configure)
/* When feeding the transposer block the pixelvalve is unneeded and
* should not be enabled.
-@@ -551,7 +553,7 @@ static void vc4_crtc_atomic_enable(struc
+@@ -553,7 +555,7 @@ static void vc4_crtc_atomic_enable(struc
CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
if (vc4_encoder->post_crtc_enable)
static enum drm_mode_status vc4_crtc_mode_valid(struct drm_crtc *crtc,
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -449,12 +449,12 @@ struct vc4_encoder {
+@@ -448,12 +448,12 @@ struct vc4_encoder {
enum vc4_encoder_type type;
u32 clock_select;
static inline struct vc4_encoder *
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -412,7 +412,8 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -416,7 +416,8 @@ static void vc4_hdmi_set_infoframes(stru
vc4_hdmi_set_audio_infoframe(encoder);
}
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-@@ -425,7 +426,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -429,7 +430,8 @@ static void vc4_hdmi_encoder_post_crtc_d
HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
}
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
int ret;
-@@ -638,7 +640,8 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -642,7 +644,8 @@ static void vc4_hdmi_recenter_fifo(struc
"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
}
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-@@ -720,7 +723,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -724,7 +727,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi->variant->set_timings(vc4_hdmi, mode);
}
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
-@@ -742,7 +746,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -746,7 +750,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
}
+++ /dev/null
-From e1b4f5c3970e14abe197f328077b348b4969e68f Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Tue, 15 Dec 2020 16:42:38 +0100
-Subject: [PATCH] drm/vc4: hdmi: Don't access the connector state in
- reset if kmalloc fails
-
-drm_atomic_helper_connector_reset uses kmalloc which, from an API
-standpoint, can fail, and thus setting connector->state to NULL.
-However, our reset hook then calls drm_atomic_helper_connector_tv_reset
-that will access connector->state without checking if it's a valid
-pointer or not.
-
-Make sure we don't end up accessing a NULL pointer.
-
-Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Suggested-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -216,7 +216,9 @@ static int vc4_hdmi_connector_get_modes(
- static void vc4_hdmi_connector_reset(struct drm_connector *connector)
- {
- drm_atomic_helper_connector_reset(connector);
-- drm_atomic_helper_connector_tv_reset(connector);
-+
-+ if (connector->state)
-+ drm_atomic_helper_connector_tv_reset(connector);
- }
-
- static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -215,10 +215,37 @@ static int vc4_hdmi_connector_get_modes(
+@@ -217,10 +217,37 @@ static int vc4_hdmi_connector_get_modes(
static void vc4_hdmi_connector_reset(struct drm_connector *connector)
{
}
static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
-@@ -226,7 +253,7 @@ static const struct drm_connector_funcs
+@@ -228,7 +255,7 @@ static const struct drm_connector_funcs
.fill_modes = drm_helper_probe_single_connector_modes,
.destroy = vc4_hdmi_connector_destroy,
.reset = vc4_hdmi_connector_reset,
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -243,6 +243,7 @@ vc4_hdmi_connector_duplicate_state(struc
+@@ -245,6 +245,7 @@ vc4_hdmi_connector_duplicate_state(struc
if (!new_state)
return NULL;
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
return &new_state->base;
-@@ -669,9 +670,29 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -671,9 +672,29 @@ static void vc4_hdmi_recenter_fifo(struc
"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
}
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long pixel_rate, hsm_rate;
-@@ -683,7 +704,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -685,7 +706,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
return;
}
ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
if (ret) {
DRM_ERROR("Failed to set pixel clock rate: %d\n", ret);
-@@ -845,6 +866,7 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -847,6 +868,7 @@ static int vc4_hdmi_encoder_atomic_check
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
struct drm_display_mode *mode = &crtc_state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long long pixel_rate = mode->clock * 1000;
-@@ -876,6 +898,8 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -878,6 +900,8 @@ static int vc4_hdmi_encoder_atomic_check
if (pixel_rate > vc4_hdmi->variant->max_pixel_clock)
return -EINVAL;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -762,7 +762,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -764,7 +764,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
}
if (vc4_hdmi->variant->phy_init)
# define VC4_HD_M_SW_RST BIT(2)
# define VC4_HD_M_ENABLE BIT(0)
-@@ -229,6 +240,8 @@ static void vc4_hdmi_connector_reset(str
+@@ -231,6 +242,8 @@ static void vc4_hdmi_connector_reset(str
if (!new_state)
return;
drm_atomic_helper_connector_tv_reset(connector);
}
-@@ -275,12 +288,20 @@ static int vc4_hdmi_connector_init(struc
+@@ -277,12 +290,20 @@ static int vc4_hdmi_connector_init(struc
vc4_hdmi->ddc);
drm_connector_helper_add(connector, &vc4_hdmi_connector_helper_funcs);
connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
DRM_CONNECTOR_POLL_DISCONNECT);
-@@ -555,6 +576,7 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -557,6 +578,7 @@ static void vc5_hdmi_csc_setup(struct vc
}
static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
struct drm_display_mode *mode)
{
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
-@@ -598,7 +620,9 @@ static void vc4_hdmi_set_timings(struct
+@@ -600,7 +622,9 @@ static void vc4_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
}
struct drm_display_mode *mode)
{
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
-@@ -618,6 +642,9 @@ static void vc5_hdmi_set_timings(struct
- mode->crtc_vsync_end -
- interlaced,
+@@ -620,6 +644,9 @@ static void vc5_hdmi_set_timings(struct
+ VC4_SET_FIELD(mode->crtc_vtotal -
+ mode->crtc_vsync_end - interlaced,
VC4_HDMI_VERTB_VBP));
+ unsigned char gcp;
+ bool gcp_en;
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
HDMI_WRITE(HDMI_HORZA,
-@@ -643,6 +670,39 @@ static void vc5_hdmi_set_timings(struct
+@@ -645,6 +672,39 @@ static void vc5_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
HDMI_WRITE(HDMI_CLOCK_STOP, 0);
}
-@@ -770,7 +830,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -772,7 +832,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS);
if (vc4_hdmi->variant->set_timings)
}
static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder,
-@@ -892,6 +952,14 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -894,6 +954,14 @@ static int vc4_hdmi_encoder_atomic_check
pixel_rate = mode->clock * 1000;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -802,6 +802,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -804,6 +804,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -151,7 +151,7 @@ static void vc4_hdmi_cec_update_clk_div(
+@@ -153,7 +153,7 @@ static void vc4_hdmi_cec_update_clk_div(
* Set the clock divider: the hsm_clock rate and this divider
* setting will give a 40 kHz CEC clock.
*/
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -310,6 +310,10 @@ static int vc4_hdmi_connector_init(struc
+@@ -312,6 +312,10 @@ static int vc4_hdmi_connector_init(struc
connector->doublescan_allowed = 0;
connector->stereo_allowed = 1;
drm_connector_attach_encoder(connector, encoder);
return 0;
-@@ -449,6 +453,25 @@ static void vc4_hdmi_set_audio_infoframe
+@@ -451,6 +455,25 @@ static void vc4_hdmi_set_audio_infoframe
vc4_hdmi_write_infoframe(encoder, &frame);
}
static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
-@@ -461,6 +484,8 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -463,6 +486,8 @@ static void vc4_hdmi_set_infoframes(stru
*/
if (vc4_hdmi->audio.streaming)
vc4_hdmi_set_audio_infoframe(encoder);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -224,6 +224,45 @@ static int vc4_hdmi_connector_get_modes(
+@@ -226,6 +226,45 @@ static int vc4_hdmi_connector_get_modes(
return ret;
}
static void vc4_hdmi_connector_reset(struct drm_connector *connector)
{
struct vc4_hdmi_connector_state *old_state =
-@@ -273,6 +312,7 @@ static const struct drm_connector_funcs
+@@ -275,6 +314,7 @@ static const struct drm_connector_funcs
static const struct drm_connector_helper_funcs vc4_hdmi_connector_helper_funcs = {
.get_modes = vc4_hdmi_connector_get_modes,
+++ /dev/null
-From d0df79e13ab947367b86d7861e34f85aa6aad020 Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Sun, 24 Jan 2021 15:44:10 +0000
-Subject: [PATCH] vc4/drm: Avoid full hdmi audio fifo writes
-
-We are getting occasional VC4_HD_MAI_CTL_ERRORF in
-HDMI_MAI_CTL which seem to correspond with audio dropouts.
-
-Reduce the threshold where we deassert DREQ to avoid the fifo overfilling
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1297,10 +1297,10 @@ static int vc4_hdmi_audio_prepare(struct
-
- /* Set the MAI threshold */
- HDMI_WRITE(HDMI_MAI_THR,
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
-- VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) |
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) |
-+ VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) |
-+ VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW));
-
- HDMI_WRITE(HDMI_MAI_CONFIG,
- VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -824,9 +824,20 @@ static int vc4_plane_mode_set(struct drm
+@@ -820,9 +820,20 @@ static int vc4_plane_mode_set(struct drm
u32 tile_w, tile, x_off, pix_per_tile;
if (fb->format->format == DRM_FORMAT_P030) {
} else {
hvs_format = HVS_PIXEL_FORMAT_H264;
-@@ -846,17 +857,16 @@ static int vc4_plane_mode_set(struct drm
+@@ -842,17 +853,16 @@ static int vc4_plane_mode_set(struct drm
default:
break;
}
/* Adjust the base pointer to the first pixel to be scanned
* out.
*
-@@ -872,9 +882,7 @@ static int vc4_plane_mode_set(struct drm
+@@ -868,9 +878,7 @@ static int vc4_plane_mode_set(struct drm
vc4_state->offsets[i] += src_y /
(i ? v_subsample : 1) *
tile_w;
+++ /dev/null
-From aa5ba5fd06cffacf4831fe6e9aef65081287924e Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Mon, 15 Mar 2021 13:28:06 +0000
-Subject: [PATCH] vc4/drm: vc4_plane: Remove subpixel positioning check
-
-There is little harm in ignoring fractional coordinates
-(they just get truncated).
-
-Without this:
-modetest -M vc4 -F tiles,gradient -s 32:1920x1080-60 -P89@74:1920x1080*.1.1@XR24
-
-is rejected. We have the same issue in Kodi when trying to
-use zoom options on video.
-
-Note: even if all coordinates are fully integer. e.g.
-src:[0,0,1920,1080] dest:[-10,-10,1940,1100]
-
-it will still get rejected as drm_atomic_helper_check_plane_state
-uses drm_rect_clip_scaled which transforms this to fractional src coords
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_plane.c | 21 ++++++++-------------
- 1 file changed, 8 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -339,7 +339,6 @@ static int vc4_plane_setup_clipping_and_
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
-- u32 subpixel_src_mask = (1 << 16) - 1;
- int num_planes = fb->format->num_planes;
- struct drm_crtc_state *crtc_state;
- u32 h_subsample = fb->format->hsub;
-@@ -361,18 +360,14 @@ static int vc4_plane_setup_clipping_and_
- for (i = 0; i < num_planes; i++)
- vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
-
-- /* We don't support subpixel source positioning for scaling. */
-- if ((state->src.x1 & subpixel_src_mask) ||
-- (state->src.x2 & subpixel_src_mask) ||
-- (state->src.y1 & subpixel_src_mask) ||
-- (state->src.y2 & subpixel_src_mask)) {
-- return -EINVAL;
-- }
--
-- vc4_state->src_x = state->src.x1 >> 16;
-- vc4_state->src_y = state->src.y1 >> 16;
-- vc4_state->src_w[0] = (state->src.x2 - state->src.x1) >> 16;
-- vc4_state->src_h[0] = (state->src.y2 - state->src.y1) >> 16;
-+ /* We don't support subpixel source positioning for scaling,
-+ * but fractional coordinates can be generated by clipping
-+ * so just round for now
-+ */
-+ vc4_state->src_x = DIV_ROUND_CLOSEST(state->src.x1, 1<<16);
-+ vc4_state->src_y = DIV_ROUND_CLOSEST(state->src.y1, 1<<16);
-+ vc4_state->src_w[0] = DIV_ROUND_CLOSEST(state->src.x2, 1<<16) - vc4_state->src_x;
-+ vc4_state->src_h[0] = DIV_ROUND_CLOSEST(state->src.y2, 1<<16) - vc4_state->src_y;
-
- vc4_state->crtc_x = state->dst.x1;
- vc4_state->crtc_y = state->dst.y1;
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -825,8 +825,9 @@ static int vc4_plane_mode_set(struct drm
+@@ -826,8 +826,9 @@ static int vc4_plane_mode_set(struct drm
* and bits[3:0] should be between 0 and 11, indicating which
* of the 12-pixels in that 128-bit word is the first pixel to be used
*/
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -224,21 +224,6 @@ static int vc4_hdmi_connector_get_modes(
+@@ -226,21 +226,6 @@ static int vc4_hdmi_connector_get_modes(
return ret;
}
static int vc4_hdmi_connector_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
-@@ -247,12 +232,13 @@ static int vc4_hdmi_connector_atomic_che
+@@ -249,12 +234,13 @@ static int vc4_hdmi_connector_atomic_che
struct drm_connector_state *new_state =
drm_atomic_get_new_connector_state(state, connector);
struct drm_crtc *crtc = new_state->crtc;
crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
-@@ -351,8 +337,7 @@ static int vc4_hdmi_connector_init(struc
+@@ -353,8 +339,7 @@ static int vc4_hdmi_connector_init(struc
connector->stereo_allowed = 1;
if (vc4_hdmi->variant->supports_hdr)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -236,7 +236,8 @@ static int vc4_hdmi_connector_atomic_che
+@@ -238,7 +238,8 @@ static int vc4_hdmi_connector_atomic_che
if (!crtc)
return 0;
struct drm_crtc_state *crtc_state;
crtc_state = drm_atomic_get_crtc_state(state, crtc);
-@@ -326,6 +327,11 @@ static int vc4_hdmi_connector_init(struc
+@@ -328,6 +329,11 @@ static int vc4_hdmi_connector_init(struc
if (ret)
return ret;
drm_connector_attach_tv_margin_properties(connector);
drm_connector_attach_max_bpc_property(connector, 8, 12);
-@@ -440,7 +446,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -442,7 +448,7 @@ static void vc4_hdmi_set_avi_infoframe(s
vc4_encoder->limited_rgb_range ?
HDMI_QUANTIZATION_RANGE_LIMITED :
HDMI_QUANTIZATION_RANGE_FULL);
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -644,10 +644,10 @@ static const u32 colorspace_coeffs[2][DR
+@@ -645,10 +645,10 @@ static const u32 colorspace_coeffs[2][DR
SCALER_CSC1_ITR_R_709_3,
SCALER_CSC2_ITR_R_709_3,
}, {
}
}, {
/* Full range */
-@@ -662,10 +662,10 @@ static const u32 colorspace_coeffs[2][DR
+@@ -663,10 +663,10 @@ static const u32 colorspace_coeffs[2][DR
SCALER_CSC1_ITR_R_709_3_FR,
SCALER_CSC2_ITR_R_709_3_FR,
}, {
}
}
};
-@@ -1487,7 +1487,8 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1488,7 +1488,8 @@ struct drm_plane *vc4_plane_init(struct
drm_plane_create_color_properties(plane,
BIT(DRM_COLOR_YCBCR_BT601) |
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -546,6 +546,9 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -548,6 +548,9 @@ static void vc4_hdmi_encoder_post_crtc_p
HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
clk_disable_unprepare(vc4_hdmi->pixel_clock);
ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
-@@ -850,9 +853,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -852,9 +855,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
* pixel clock, but HSM ends up being the limiting factor.
*/
hsm_rate = max_t(unsigned long, 120000000, (pixel_rate / 100) * 101);
return;
}
-@@ -864,10 +867,12 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -866,10 +869,12 @@ static void vc4_hdmi_encoder_pre_crtc_co
* FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
* at 300MHz.
*/
clk_disable_unprepare(vc4_hdmi->pixel_clock);
return;
}
-@@ -875,6 +880,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -877,6 +882,9 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
if (ret) {
DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
+++ /dev/null
-From f9211d36925dac42f910d7d2e4c370e414fd24d2 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 3 Dec 2020 14:25:36 +0100
-Subject: [PATCH] drm/vc4: drv: Remove the DSI pointer in vc4_drv
-
-Commit 51f4fcd9c4ea867c3b4fe58111f342ad0e80642a upstream.
-
-That pointer isn't used anywhere, so there's no point in keeping it.
-
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
-Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-2-maxime@cerno.tech
----
- drivers/gpu/drm/vc4/vc4_drv.h | 1 -
- drivers/gpu/drm/vc4/vc4_dsi.c | 9 ---------
- 2 files changed, 10 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -81,7 +81,6 @@ struct vc4_dev {
- struct vc4_hvs *hvs;
- struct vc4_v3d *v3d;
- struct vc4_dpi *dpi;
-- struct vc4_dsi *dsi1;
- struct vc4_vec *vec;
- struct vc4_txp *txp;
- struct vc4_fkms *fkms;
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1451,7 +1451,6 @@ static int vc4_dsi_bind(struct device *d
- {
- struct platform_device *pdev = to_platform_device(dev);
- struct drm_device *drm = dev_get_drvdata(master);
-- struct vc4_dev *vc4 = to_vc4_dev(drm);
- struct vc4_dsi *dsi = dev_get_drvdata(dev);
- struct vc4_dsi_encoder *vc4_dsi_encoder;
- struct drm_panel *panel;
-@@ -1604,9 +1603,6 @@ static int vc4_dsi_bind(struct device *d
- if (ret)
- return ret;
-
-- if (dsi->port == 1)
-- vc4->dsi1 = dsi;
--
- drm_simple_encoder_init(drm, dsi->encoder, DRM_MODE_ENCODER_DSI);
- drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
-
-@@ -1635,8 +1631,6 @@ static int vc4_dsi_bind(struct device *d
- static void vc4_dsi_unbind(struct device *dev, struct device *master,
- void *data)
- {
-- struct drm_device *drm = dev_get_drvdata(master);
-- struct vc4_dev *vc4 = to_vc4_dev(drm);
- struct vc4_dsi *dsi = dev_get_drvdata(dev);
-
- if (dsi->bridge)
-@@ -1648,9 +1642,6 @@ static void vc4_dsi_unbind(struct device
- */
- list_splice_init(&dsi->bridge_chain, &dsi->encoder->bridge_chain);
- drm_encoder_cleanup(dsi->encoder);
--
-- if (dsi->port == 1)
-- vc4->dsi1 = NULL;
- }
-
- static const struct component_ops vc4_dsi_ops = {
+++ /dev/null
-From 7fe646b726b66c16f731e36e95d7eda9f182ba4d Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 3 Dec 2020 14:25:38 +0100
-Subject: [PATCH] drm/vc4: dsi: Use snprintf for the PHY clocks instead
- of an array
-
-Commit dc0bf36401e891c853e0a25baeb4e0b4e6f3626d upstream.
-
-The DSI clocks setup function has been using an array to store the clock
-name of either the DSI0 or DSI1 blocks, using the port ID to choose the
-proper one.
-
-Let's switch to an snprintf call to do the same thing and simplify the
-array a bit.
-
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
-Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-4-maxime@cerno.tech
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 17 +++++++++--------
- 1 file changed, 9 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1390,12 +1390,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *
- struct device *dev = &dsi->pdev->dev;
- const char *parent_name = __clk_get_name(dsi->pll_phy_clock);
- static const struct {
-- const char *dsi0_name, *dsi1_name;
-+ const char *name;
- int div;
- } phy_clocks[] = {
-- { "dsi0_byte", "dsi1_byte", 8 },
-- { "dsi0_ddr2", "dsi1_ddr2", 4 },
-- { "dsi0_ddr", "dsi1_ddr", 2 },
-+ { "byte", 8 },
-+ { "ddr2", 4 },
-+ { "ddr", 2 },
- };
- int i;
-
-@@ -1411,8 +1411,12 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *
- for (i = 0; i < ARRAY_SIZE(phy_clocks); i++) {
- struct clk_fixed_factor *fix = &dsi->phy_clocks[i];
- struct clk_init_data init;
-+ char clk_name[16];
- int ret;
-
-+ snprintf(clk_name, sizeof(clk_name),
-+ "dsi%u_%s", dsi->port, phy_clocks[i].name);
-+
- /* We just use core fixed factor clock ops for the PHY
- * clocks. The clocks are actually gated by the
- * PHY_AFEC0_DDRCLK_EN bits, which we should be
-@@ -1429,10 +1433,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *
- memset(&init, 0, sizeof(init));
- init.parent_names = &parent_name;
- init.num_parents = 1;
-- if (dsi->port == 1)
-- init.name = phy_clocks[i].dsi1_name;
-- else
-- init.name = phy_clocks[i].dsi0_name;
-+ init.name = clk_name;
- init.ops = &clk_fixed_factor_ops;
-
- ret = devm_clk_hw_register(dev, &fix->hw);
+++ /dev/null
-From 4dd1101f3e16e6202132ae34a8da2a7d78043d56 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 3 Dec 2020 14:25:39 +0100
-Subject: [PATCH] drm/vc4: dsi: Introduce a variant structure
-
-Commit d1d195ce26a14ec0a87816c09ae514e1c40e97f7 upstream.
-
-Most of the differences between DSI0 and DSI1 are handled through the
-ID. However, the BCM2711 DSI is going to introduce one more variable to
-the mix and will break some expectations of the earlier, simpler, test.
-
-Let's add a variant structure that will address most of the differences
-between those three controllers.
-
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
-Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-5-maxime@cerno.tech
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 63 ++++++++++++++++++++---------------
- 1 file changed, 37 insertions(+), 26 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -493,6 +493,18 @@
- */
- #define DSI1_ID 0x8c
-
-+struct vc4_dsi_variant {
-+ /* Whether we're on bcm2835's DSI0 or DSI1. */
-+ unsigned int port;
-+
-+ bool broken_axi_workaround;
-+
-+ const char *debugfs_name;
-+ const struct debugfs_reg32 *regs;
-+ size_t nregs;
-+
-+};
-+
- /* General DSI hardware state. */
- struct vc4_dsi {
- struct platform_device *pdev;
-@@ -509,8 +521,7 @@ struct vc4_dsi {
- u32 *reg_dma_mem;
- dma_addr_t reg_paddr;
-
-- /* Whether we're on bcm2835's DSI0 or DSI1. */
-- int port;
-+ const struct vc4_dsi_variant *variant;
-
- /* DSI channel for the panel we're connected to. */
- u32 channel;
-@@ -586,10 +597,10 @@ dsi_dma_workaround_write(struct vc4_dsi
- #define DSI_READ(offset) readl(dsi->regs + (offset))
- #define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val)
- #define DSI_PORT_READ(offset) \
-- DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset)
-+ DSI_READ(dsi->variant->port ? DSI1_##offset : DSI0_##offset)
- #define DSI_PORT_WRITE(offset, val) \
-- DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val)
--#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit)
-+ DSI_WRITE(dsi->variant->port ? DSI1_##offset : DSI0_##offset, val)
-+#define DSI_PORT_BIT(bit) (dsi->variant->port ? DSI1_##bit : DSI0_##bit)
-
- /* VC4 DSI encoder KMS struct */
- struct vc4_dsi_encoder {
-@@ -837,7 +848,7 @@ static void vc4_dsi_encoder_enable(struc
-
- ret = pm_runtime_resume_and_get(dev);
- if (ret) {
-- DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port);
-+ DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->variant->port);
- return;
- }
-
-@@ -871,7 +882,7 @@ static void vc4_dsi_encoder_enable(struc
- DSI_PORT_WRITE(STAT, DSI_PORT_READ(STAT));
-
- /* Set AFE CTR00/CTR1 to release powerdown of analog. */
-- if (dsi->port == 0) {
-+ if (dsi->variant->port == 0) {
- u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
- VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ));
-
-@@ -1017,7 +1028,7 @@ static void vc4_dsi_encoder_enable(struc
- DSI_PORT_BIT(PHYC_CLANE_ENABLE) |
- ((dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ?
- 0 : DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS)) |
-- (dsi->port == 0 ?
-+ (dsi->variant->port == 0 ?
- VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) :
- VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT)));
-
-@@ -1043,13 +1054,13 @@ static void vc4_dsi_encoder_enable(struc
- DSI_DISP1_ENABLE);
-
- /* Ungate the block. */
-- if (dsi->port == 0)
-+ if (dsi->variant->port == 0)
- DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0);
- else
- DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
-
- /* Bring AFE out of reset. */
-- if (dsi->port == 0) {
-+ if (dsi->variant->port == 0) {
- } else {
- DSI_PORT_WRITE(PHY_AFEC0,
- DSI_PORT_READ(PHY_AFEC0) &
-@@ -1305,8 +1316,16 @@ static const struct drm_encoder_helper_f
- .mode_fixup = vc4_dsi_encoder_mode_fixup,
- };
-
-+static const struct vc4_dsi_variant bcm2835_dsi1_variant = {
-+ .port = 1,
-+ .broken_axi_workaround = true,
-+ .debugfs_name = "dsi1_regs",
-+ .regs = dsi1_regs,
-+ .nregs = ARRAY_SIZE(dsi1_regs),
-+};
-+
- static const struct of_device_id vc4_dsi_dt_match[] = {
-- { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 },
-+ { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant },
- {}
- };
-
-@@ -1317,7 +1336,7 @@ static void dsi_handle_error(struct vc4_
- if (!(stat & bit))
- return;
-
-- DRM_ERROR("DSI%d: %s error\n", dsi->port, type);
-+ DRM_ERROR("DSI%d: %s error\n", dsi->variant->port, type);
- *ret = IRQ_HANDLED;
- }
-
-@@ -1415,7 +1434,7 @@ vc4_dsi_init_phy_clocks(struct vc4_dsi *
- int ret;
-
- snprintf(clk_name, sizeof(clk_name),
-- "dsi%u_%s", dsi->port, phy_clocks[i].name);
-+ "dsi%u_%s", dsi->variant->port, phy_clocks[i].name);
-
- /* We just use core fixed factor clock ops for the PHY
- * clocks. The clocks are actually gated by the
-@@ -1463,7 +1482,7 @@ static int vc4_dsi_bind(struct device *d
- if (!match)
- return -ENODEV;
-
-- dsi->port = (uintptr_t)match->data;
-+ dsi->variant = match->data;
-
- vc4_dsi_encoder = devm_kzalloc(dev, sizeof(*vc4_dsi_encoder),
- GFP_KERNEL);
-@@ -1480,13 +1499,8 @@ static int vc4_dsi_bind(struct device *d
- return PTR_ERR(dsi->regs);
-
- dsi->regset.base = dsi->regs;
-- if (dsi->port == 0) {
-- dsi->regset.regs = dsi0_regs;
-- dsi->regset.nregs = ARRAY_SIZE(dsi0_regs);
-- } else {
-- dsi->regset.regs = dsi1_regs;
-- dsi->regset.nregs = ARRAY_SIZE(dsi1_regs);
-- }
-+ dsi->regset.regs = dsi->variant->regs;
-+ dsi->regset.nregs = dsi->variant->nregs;
-
- if (DSI_PORT_READ(ID) != DSI_ID_VALUE) {
- dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
-@@ -1498,7 +1512,7 @@ static int vc4_dsi_bind(struct device *d
- * from the ARM. It does handle writes from the DMA engine,
- * so set up a channel for talking to it.
- */
-- if (dsi->port == 1) {
-+ if (dsi->variant->broken_axi_workaround) {
- dsi->reg_dma_mem = dma_alloc_coherent(dev, 4,
- &dsi->reg_dma_paddr,
- GFP_KERNEL);
-@@ -1619,10 +1633,7 @@ static int vc4_dsi_bind(struct device *d
- */
- list_splice_init(&dsi->encoder->bridge_chain, &dsi->bridge_chain);
-
-- if (dsi->port == 0)
-- vc4_debugfs_add_regset32(drm, "dsi0_regs", &dsi->regset);
-- else
-- vc4_debugfs_add_regset32(drm, "dsi1_regs", &dsi->regset);
-+ vc4_debugfs_add_regset32(drm, dsi->variant->debugfs_name, &dsi->regset);
-
- pm_runtime_enable(dev);
-
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1316,6 +1316,13 @@ static const struct drm_encoder_helper_f
+@@ -1374,6 +1374,13 @@ static const struct drm_encoder_helper_f
.mode_fixup = vc4_dsi_encoder_mode_fixup,
};
static const struct vc4_dsi_variant bcm2835_dsi1_variant = {
.port = 1,
.broken_axi_workaround = true,
-@@ -1325,6 +1332,7 @@ static const struct vc4_dsi_variant bcm2
+@@ -1383,6 +1390,7 @@ static const struct vc4_dsi_variant bcm2
};
static const struct of_device_id vc4_dsi_dt_match[] = {
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1316,6 +1316,13 @@ static const struct drm_encoder_helper_f
+@@ -1374,6 +1374,13 @@ static const struct drm_encoder_helper_f
.mode_fixup = vc4_dsi_encoder_mode_fixup,
};
static const struct vc4_dsi_variant bcm2835_dsi0_variant = {
.port = 0,
.debugfs_name = "dsi0_regs",
-@@ -1332,6 +1339,7 @@ static const struct vc4_dsi_variant bcm2
+@@ -1390,6 +1397,7 @@ static const struct vc4_dsi_variant bcm2
};
static const struct of_device_id vc4_dsi_dt_match[] = {
{ .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant },
{ .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant },
{}
-@@ -1516,8 +1524,8 @@ static int vc4_dsi_bind(struct device *d
+@@ -1577,8 +1585,8 @@ static int vc4_dsi_bind(struct device *d
return -ENODEV;
}
+++ /dev/null
-From 59938610a705283fef63447c7e777781358610e2 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 11 Feb 2021 18:37:04 +0000
-Subject: [PATCH] drm/vc4: Correct pixel order for DSI0
-
-For slightly unknown reasons, dsi0 takes a different pixel format
-to dsi1, and that has to be set in the pixel valve.
-
-Amend the setup accordingly.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -319,7 +319,8 @@ static void vc4_crtc_config_pv(struct dr
- u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
- bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
- vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
-- u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
-+ bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
-+ u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
- u8 ppc = pv_data->pixels_per_clock;
- bool debug_dump_regs = false;
-
+++ /dev/null
-From b627cebfc64dd944b9571203e30456efbc0101c3 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 8 Feb 2021 11:22:01 +0000
-Subject: [PATCH] drm/vc4: Register dsi0 as the correct vc4 encoder
- type
-
-vc4_dsi was registering both dsi0 and dsi1 as VC4_ENCODER_TYPE_DSI1
-which seemed to work OK for a single DSI display, but fails
-if there are two DSI displays connected.
-
-Update to register the correct type.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -1506,7 +1506,8 @@ static int vc4_dsi_bind(struct device *d
- return -ENOMEM;
-
- INIT_LIST_HEAD(&dsi->bridge_chain);
-- vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1;
-+ vc4_dsi_encoder->base.type = dsi->variant->port ?
-+ VC4_ENCODER_TYPE_DSI1 : VC4_ENCODER_TYPE_DSI0;
- vc4_dsi_encoder->dsi = dsi;
- dsi->encoder = &vc4_dsi_encoder->base.base;
-
+++ /dev/null
-From 1ad48331b7697e4fbc9f4bd376fc2db342045cb6 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Wed, 10 Feb 2021 18:46:22 +0000
-Subject: [PATCH] drm/vc4: Fix dsi0 interrupt support.
-
-DSI0 seemingly had very little or no testing as a load of
-the register mappings were incorrect/missing, so host
-transfers always timed out due to enabling/checking incorrect
-bits in the interrupt enable and status registers.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 111 ++++++++++++++++++++++++++--------
- 1 file changed, 85 insertions(+), 26 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -181,8 +181,50 @@
-
- #define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */
-
--#define DSI0_INT_STAT 0x24
--#define DSI0_INT_EN 0x28
-+#define DSI0_INT_STAT 0x24
-+#define DSI0_INT_EN 0x28
-+# define DSI0_INT_FIFO_ERR BIT(25)
-+# define DSI0_INT_CMDC_DONE_MASK VC4_MASK(24, 23)
-+# define DSI0_INT_CMDC_DONE_SHIFT 23
-+# define DSI0_INT_CMDC_DONE_NO_REPEAT 1
-+# define DSI0_INT_CMDC_DONE_REPEAT 3
-+# define DSI0_INT_PHY_DIR_RTF BIT(22)
-+# define DSI0_INT_PHY_D1_ULPS BIT(21)
-+# define DSI0_INT_PHY_D1_STOP BIT(20)
-+# define DSI0_INT_PHY_RXLPDT BIT(19)
-+# define DSI0_INT_PHY_RXTRIG BIT(18)
-+# define DSI0_INT_PHY_D0_ULPS BIT(17)
-+# define DSI0_INT_PHY_D0_LPDT BIT(16)
-+# define DSI0_INT_PHY_D0_FTR BIT(15)
-+# define DSI0_INT_PHY_D0_STOP BIT(14)
-+/* Signaled when the clock lane enters the given state. */
-+# define DSI0_INT_PHY_CLK_ULPS BIT(13)
-+# define DSI0_INT_PHY_CLK_HS BIT(12)
-+# define DSI0_INT_PHY_CLK_FTR BIT(11)
-+/* Signaled on timeouts */
-+# define DSI0_INT_PR_TO BIT(10)
-+# define DSI0_INT_TA_TO BIT(9)
-+# define DSI0_INT_LPRX_TO BIT(8)
-+# define DSI0_INT_HSTX_TO BIT(7)
-+/* Contention on a line when trying to drive the line low */
-+# define DSI0_INT_ERR_CONT_LP1 BIT(6)
-+# define DSI0_INT_ERR_CONT_LP0 BIT(5)
-+/* Control error: incorrect line state sequence on data lane 0. */
-+# define DSI0_INT_ERR_CONTROL BIT(4)
-+# define DSI0_INT_ERR_SYNC_ESC BIT(3)
-+# define DSI0_INT_RX2_PKT BIT(2)
-+# define DSI0_INT_RX1_PKT BIT(1)
-+# define DSI0_INT_CMD_PKT BIT(0)
-+
-+#define DSI0_INTERRUPTS_ALWAYS_ENABLED (DSI0_INT_ERR_SYNC_ESC | \
-+ DSI0_INT_ERR_CONTROL | \
-+ DSI0_INT_ERR_CONT_LP0 | \
-+ DSI0_INT_ERR_CONT_LP1 | \
-+ DSI0_INT_HSTX_TO | \
-+ DSI0_INT_LPRX_TO | \
-+ DSI0_INT_TA_TO | \
-+ DSI0_INT_PR_TO)
-+
- # define DSI1_INT_PHY_D3_ULPS BIT(30)
- # define DSI1_INT_PHY_D3_STOP BIT(29)
- # define DSI1_INT_PHY_D2_ULPS BIT(28)
-@@ -894,6 +936,9 @@ static void vc4_dsi_encoder_enable(struc
-
- DSI_PORT_WRITE(PHY_AFEC0, afec0);
-
-+ /* AFEC reset hold time */
-+ mdelay(1);
-+
- DSI_PORT_WRITE(PHY_AFEC1,
- VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) |
- VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) |
-@@ -1060,12 +1105,9 @@ static void vc4_dsi_encoder_enable(struc
- DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
-
- /* Bring AFE out of reset. */
-- if (dsi->variant->port == 0) {
-- } else {
-- DSI_PORT_WRITE(PHY_AFEC0,
-- DSI_PORT_READ(PHY_AFEC0) &
-- ~DSI1_PHY_AFEC0_RESET);
-- }
-+ DSI_PORT_WRITE(PHY_AFEC0,
-+ DSI_PORT_READ(PHY_AFEC0) &
-+ ~DSI_PORT_BIT(PHY_AFEC0_RESET));
-
- vc4_dsi_ulps(dsi, false);
-
-@@ -1184,13 +1226,28 @@ static ssize_t vc4_dsi_host_transfer(str
- /* Enable the appropriate interrupt for the transfer completion. */
- dsi->xfer_result = 0;
- reinit_completion(&dsi->xfer_completion);
-- DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-- if (msg->rx_len) {
-- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-- DSI1_INT_PHY_DIR_RTF));
-+ if (dsi->variant->port == 0) {
-+ DSI_PORT_WRITE(INT_STAT,
-+ DSI0_INT_CMDC_DONE_MASK | DSI1_INT_PHY_DIR_RTF);
-+ if (msg->rx_len) {
-+ DSI_PORT_WRITE(INT_EN, (DSI0_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI0_INT_PHY_DIR_RTF));
-+ } else {
-+ DSI_PORT_WRITE(INT_EN,
-+ (DSI0_INTERRUPTS_ALWAYS_ENABLED |
-+ VC4_SET_FIELD(DSI0_INT_CMDC_DONE_NO_REPEAT,
-+ DSI0_INT_CMDC_DONE)));
-+ }
- } else {
-- DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-- DSI1_INT_TXPKT1_DONE));
-+ DSI_PORT_WRITE(INT_STAT,
-+ DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-+ if (msg->rx_len) {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_PHY_DIR_RTF));
-+ } else {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_TXPKT1_DONE));
-+ }
- }
-
- /* Send the packet. */
-@@ -1207,7 +1264,7 @@ static ssize_t vc4_dsi_host_transfer(str
- ret = dsi->xfer_result;
- }
-
-- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
-
- if (ret)
- goto reset_fifo_and_return;
-@@ -1253,7 +1310,7 @@ reset_fifo_and_return:
- DSI_PORT_BIT(CTRL_RESET_FIFOS));
-
- DSI_PORT_WRITE(TXPKT1C, 0);
-- DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ DSI_PORT_WRITE(INT_EN, DSI_PORT_BIT(INTERRUPTS_ALWAYS_ENABLED));
- return ret;
- }
-
-@@ -1386,26 +1443,28 @@ static irqreturn_t vc4_dsi_irq_handler(i
- DSI_PORT_WRITE(INT_STAT, stat);
-
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
-+ DSI_PORT_BIT(INT_ERR_SYNC_ESC), "LPDT sync");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONTROL, "data lane 0 sequence");
-+ DSI_PORT_BIT(INT_ERR_CONTROL), "data lane 0 sequence");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONT_LP0, "LP0 contention");
-+ DSI_PORT_BIT(INT_ERR_CONT_LP0), "LP0 contention");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_ERR_CONT_LP1, "LP1 contention");
-+ DSI_PORT_BIT(INT_ERR_CONT_LP1), "LP1 contention");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_HSTX_TO, "HSTX timeout");
-+ DSI_PORT_BIT(INT_HSTX_TO), "HSTX timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_LPRX_TO, "LPRX timeout");
-+ DSI_PORT_BIT(INT_LPRX_TO), "LPRX timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_TA_TO, "turnaround timeout");
-+ DSI_PORT_BIT(INT_TA_TO), "turnaround timeout");
- dsi_handle_error(dsi, &ret, stat,
-- DSI1_INT_PR_TO, "peripheral reset timeout");
-+ DSI_PORT_BIT(INT_PR_TO), "peripheral reset timeout");
-
-- if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) {
-+ if (stat & ((dsi->variant->port ? DSI1_INT_TXPKT1_DONE :
-+ DSI0_INT_CMDC_DONE_MASK) |
-+ DSI_PORT_BIT(INT_PHY_DIR_RTF))) {
- complete(&dsi->xfer_completion);
- ret = IRQ_HANDLED;
-- } else if (stat & DSI1_INT_HSTX_TO) {
-+ } else if (stat & DSI_PORT_BIT(INT_HSTX_TO)) {
- complete(&dsi->xfer_completion);
- dsi->xfer_result = -ETIMEDOUT;
- ret = IRQ_HANDLED;
+++ /dev/null
-From 709279f0925b7e17f64684a8cab44e1cb72ae56e Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 15 Apr 2021 16:18:16 +0100
-Subject: [PATCH] drm/vc4: Add correct stop condition to
- vc4_dsi_encoder_disable iteration
-
-vc4_dsi_encoder_disable is partially an open coded version of
-drm_bridge_chain_disable, but it missed a termination condition
-in the loop for ->disable which meant that no post_disable
-calls were made.
-
-Add in the termination clause.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_dsi.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_dsi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -803,6 +803,9 @@ static void vc4_dsi_encoder_disable(stru
- list_for_each_entry_reverse(iter, &dsi->bridge_chain, chain_node) {
- if (iter->funcs->disable)
- iter->funcs->disable(iter);
-+
-+ if (iter == dsi->bridge)
-+ break;
- }
-
- vc4_dsi_ulps(dsi, true);
#define CEC_CLOCK_FREQ 40000
-#define VC4_HSM_MID_CLOCK 149985000
- static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
- {
-@@ -814,7 +813,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+ #define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
+
+@@ -816,7 +815,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
conn_state_to_vc4_hdmi_conn_state(conn_state);
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
int ret;
ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
-@@ -863,12 +862,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -865,12 +864,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8
#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK VC4_MASK(10, 8)
-@@ -518,6 +521,64 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -520,6 +523,64 @@ static void vc4_hdmi_set_infoframes(stru
vc4_hdmi_set_hdr_infoframe(encoder);
}
static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
-@@ -530,6 +591,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -532,6 +593,8 @@ static void vc4_hdmi_encoder_post_crtc_d
HDMI_WRITE(HDMI_VID_CTL,
HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
}
static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
-@@ -980,6 +1043,7 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -982,6 +1045,7 @@ static void vc4_hdmi_encoder_post_crtc_e
}
vc4_hdmi_recenter_fifo(vc4_hdmi);
+++ /dev/null
-From 4950d441d18161b2432965ba3fc99382beafdf02 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime@cerno.tech>
-Date: Thu, 8 Oct 2020 16:08:06 +0200
-Subject: [PATCH] drm/vc4: hdmi: Raise the maximum clock rate
-
-Now that we have the infrastructure in place, we can raise the maximum
-pixel rate we can reach for HDMI0 on the BCM2711.
-
-HDMI1 is left untouched since its pixelvalve has a smaller FIFO and
-would need a clock faster than what we can provide to support the same
-modes.
-
-Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
-Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Signed-off-by: Maxime Ripard <maxime@cerno.tech>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2434,7 +2434,7 @@ static const struct vc4_hdmi_variant bcm
- .encoder_type = VC4_ENCODER_TYPE_HDMI0,
- .debugfs_name = "hdmi0_regs",
- .card_name = "vc4-hdmi-0",
-- .max_pixel_clock = 297000000,
-+ .max_pixel_clock = 600000000,
- .registers = vc5_hdmi_hdmi0_fields,
- .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields),
- .phy_lane_mapping = {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -608,7 +608,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -610,7 +610,8 @@ static void vc4_hdmi_encoder_post_crtc_p
HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
clk_disable_unprepare(vc4_hdmi->hsm_clock);
clk_request_done(vc4_hdmi->hsm_req);
clk_disable_unprepare(vc4_hdmi->pixel_clock);
-@@ -932,7 +933,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -934,7 +935,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
else
bvb_rate = 75000000;
if (IS_ERR(vc4_hdmi->bvb_req)) {
DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", PTR_ERR(vc4_hdmi->bvb_req));
clk_request_done(vc4_hdmi->hsm_req);
-@@ -944,7 +946,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -946,7 +948,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
if (ret) {
DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE;
u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
-@@ -540,7 +540,7 @@ static void vc4_crtc_atomic_enable(struc
+@@ -541,7 +541,7 @@ static void vc4_crtc_atomic_enable(struc
if (vc4_encoder->pre_crtc_configure)
vc4_encoder->pre_crtc_configure(encoder, state);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
-@@ -425,7 +434,8 @@ static int vc4_crtc_disable(struct drm_c
+@@ -426,7 +435,8 @@ static int vc4_crtc_disable(struct drm_c
struct drm_atomic_state *state,
unsigned int channel)
{
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct drm_device *dev = crtc->dev;
-@@ -525,7 +535,8 @@ static void vc4_crtc_atomic_enable(struc
+@@ -526,7 +536,8 @@ static void vc4_crtc_atomic_enable(struc
{
struct drm_device *dev = crtc->dev;
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -431,11 +431,10 @@ static void require_hvs_enabled(struct d
+@@ -432,11 +432,10 @@ static void require_hvs_enabled(struct d
}
static int vc4_crtc_disable(struct drm_crtc *crtc,
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct drm_device *dev = crtc->dev;
-@@ -476,10 +475,29 @@ static int vc4_crtc_disable(struct drm_c
+@@ -477,10 +476,29 @@ static int vc4_crtc_disable(struct drm_c
return 0;
}
int channel;
if (!(of_device_is_compatible(vc4_crtc->pdev->dev.of_node,
-@@ -498,7 +516,17 @@ int vc4_crtc_disable_at_boot(struct drm_
+@@ -499,7 +517,17 @@ int vc4_crtc_disable_at_boot(struct drm_
if (channel < 0)
return 0;
}
static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
-@@ -507,6 +535,8 @@ static void vc4_crtc_atomic_disable(stru
+@@ -508,6 +536,8 @@ static void vc4_crtc_atomic_disable(stru
struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
crtc);
struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state);
struct drm_device *dev = crtc->dev;
require_hvs_enabled(dev);
-@@ -514,7 +544,7 @@ static void vc4_crtc_atomic_disable(stru
+@@ -515,7 +545,7 @@ static void vc4_crtc_atomic_disable(stru
/* Disable vblank irq handling before crtc is disabled. */
drm_crtc_vblank_off(crtc);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -852,31 +852,16 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -854,31 +854,16 @@ static void vc4_hdmi_recenter_fifo(struc
"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -538,6 +538,8 @@ static bool vc4_hdmi_supports_scrambling
+@@ -540,6 +540,8 @@ static bool vc4_hdmi_supports_scrambling
return true;
}
static void vc4_hdmi_enable_scrambling(struct drm_encoder *encoder)
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
-@@ -554,6 +556,9 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -556,6 +558,9 @@ static void vc4_hdmi_enable_scrambling(s
HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) |
VC5_HDMI_SCRAMBLER_CTL_ENABLE);
}
static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder)
-@@ -572,6 +577,9 @@ static void vc4_hdmi_disable_scrambling(
+@@ -574,6 +579,9 @@ static void vc4_hdmi_disable_scrambling(
if (crtc && !vc4_hdmi_mode_needs_scrambling(&crtc->mode))
return;
HDMI_WRITE(HDMI_SCRAMBLER_CTL, HDMI_READ(HDMI_SCRAMBLER_CTL) &
~VC5_HDMI_SCRAMBLER_CTL_ENABLE);
-@@ -579,6 +587,22 @@ static void vc4_hdmi_disable_scrambling(
+@@ -581,6 +589,22 @@ static void vc4_hdmi_disable_scrambling(
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, false);
}
+ return (mode->clock * 1000) > HDMI_14_MAX_TMDS_CLK;
+}
- static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
- {
-@@ -473,16 +480,10 @@ static void vc4_hdmi_set_spd_infoframe(s
+ #define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
+
+@@ -475,16 +482,10 @@ static void vc4_hdmi_set_spd_infoframe(s
static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_write_infoframe(encoder, &frame);
}
-@@ -1215,18 +1216,10 @@ static inline struct vc4_hdmi *dai_to_hd
+@@ -1217,18 +1218,10 @@ static inline struct vc4_hdmi *dai_to_hd
return snd_soc_card_get_drvdata(card);
}
/*
* If the HDMI encoder hasn't probed, or the encoder is
-@@ -1236,15 +1229,18 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1238,15 +1231,18 @@ static int vc4_hdmi_audio_startup(struct
VC4_HDMI_RAM_PACKET_ENABLE))
return -ENODEV;
return 0;
}
-@@ -1264,17 +1260,20 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1266,17 +1262,20 @@ static void vc4_hdmi_audio_reset(struct
HDMI_WRITE(HDMI_MAI_CTL, VC4_HD_MAI_CTL_FLUSH);
}
}
static int sample_rate_to_mai_fmt(int samplerate)
-@@ -1316,42 +1315,35 @@ static int sample_rate_to_mai_fmt(int sa
+@@ -1318,42 +1317,35 @@ static int sample_rate_to_mai_fmt(int sa
}
/* HDMI audio codec callbacks */
mai_audio_format = VC4_HDMI_MAI_FORMAT_HBR;
else
mai_audio_format = VC4_HDMI_MAI_FORMAT_PCM;
-@@ -1388,148 +1380,12 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1390,148 +1382,12 @@ static int vc4_hdmi_audio_prepare(struct
HDMI_WRITE(HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
vc4_hdmi_set_n_cts(vc4_hdmi);
static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = {
SND_SOC_DAPM_OUTPUT("TX"),
};
-@@ -1540,8 +1396,6 @@ static const struct snd_soc_dapm_route v
+@@ -1542,8 +1398,6 @@ static const struct snd_soc_dapm_route v
static const struct snd_soc_component_driver vc4_hdmi_audio_component_drv = {
.name = "vc4-hdmi-codec-dai-component",
.dapm_widgets = vc4_hdmi_audio_widgets,
.num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets),
.dapm_routes = vc4_hdmi_audio_routes,
-@@ -1552,28 +1406,6 @@ static const struct snd_soc_component_dr
+@@ -1554,28 +1408,6 @@ static const struct snd_soc_component_dr
.non_legacy_dai_naming = 1,
};
static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = {
.name = "vc4-hdmi-cpu-dai-component",
};
-@@ -1600,7 +1432,6 @@ static struct snd_soc_dai_driver vc4_hdm
+@@ -1602,7 +1434,6 @@ static struct snd_soc_dai_driver vc4_hdm
SNDRV_PCM_RATE_192000,
.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE,
},
};
static const struct snd_dmaengine_pcm_config pcm_conf = {
-@@ -1608,6 +1439,31 @@ static const struct snd_dmaengine_pcm_co
+@@ -1610,6 +1441,31 @@ static const struct snd_dmaengine_pcm_co
.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
};
static int vc4_hdmi_audio_init(struct vc4_hdmi *vc4_hdmi)
{
const struct vc4_hdmi_register *mai_data =
-@@ -1615,6 +1471,7 @@ static int vc4_hdmi_audio_init(struct vc
+@@ -1617,6 +1473,7 @@ static int vc4_hdmi_audio_init(struct vc
struct snd_soc_dai_link *dai_link = &vc4_hdmi->audio.link;
struct snd_soc_card *card = &vc4_hdmi->audio.card;
struct device *dev = &vc4_hdmi->pdev->dev;
+ struct platform_device *codec_pdev;
const __be32 *addr;
- int index;
+ int index, len;
int ret;
@@ -1650,11 +1507,6 @@ static int vc4_hdmi_audio_init(struct vc
vc4_hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1165,12 +1165,13 @@ static u32 vc5_hdmi_channel_map(struct v
+@@ -1167,12 +1167,13 @@ static u32 vc5_hdmi_channel_map(struct v
}
/* HDMI audio codec callbacks */
VC4_HD_MAI_SMP_N_MASK >>
VC4_HD_MAI_SMP_N_SHIFT,
(VC4_HD_MAI_SMP_M_MASK >>
-@@ -1182,12 +1183,11 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1184,12 +1185,11 @@ static void vc4_hdmi_audio_set_mai_clock
VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M));
}
u32 n, cts;
u64 tmp;
-@@ -1321,27 +1321,25 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1323,27 +1323,25 @@ static int vc4_hdmi_audio_prepare(struct
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
if (params->iec.status[0] & IEC958_AES0_NONAUDIO &&
params->channels == 8)
mai_audio_format = VC4_HDMI_MAI_FORMAT_HBR;
-@@ -1359,7 +1357,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1361,7 +1359,7 @@ static int vc4_hdmi_audio_prepare(struct
VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS |
VC4_SET_FIELD(0x8, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER);
audio_packet_config |= VC4_SET_FIELD(channel_mask,
VC4_HDMI_AUDIO_PACKET_CEA_MASK);
-@@ -1378,7 +1376,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1380,7 +1378,7 @@ static int vc4_hdmi_audio_prepare(struct
channel_map = vc4_hdmi->variant->channel_map(vc4_hdmi, channel_mask);
HDMI_WRITE(HDMI_MAI_CHANNEL_MAP, channel_map);
HDMI_WRITE(HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
-@@ -581,7 +580,7 @@ static void vc4_crtc_atomic_enable(struc
+@@ -582,7 +581,7 @@ static void vc4_crtc_atomic_enable(struc
if (vc4_encoder->pre_crtc_configure)
vc4_encoder->pre_crtc_configure(encoder, state);
return NULL;
}
-@@ -534,8 +522,7 @@ static void vc4_crtc_atomic_disable(stru
+@@ -535,8 +523,7 @@ static void vc4_crtc_atomic_disable(stru
struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
crtc);
struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state);
struct drm_device *dev = crtc->dev;
require_hvs_enabled(dev);
-@@ -562,10 +549,11 @@ static void vc4_crtc_atomic_disable(stru
+@@ -563,10 +550,11 @@ static void vc4_crtc_atomic_disable(stru
static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *state)
{
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -525,6 +525,9 @@ static void vc4_crtc_atomic_disable(stru
+@@ -526,6 +526,9 @@ static void vc4_crtc_atomic_disable(stru
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, old_state);
struct drm_device *dev = crtc->dev;
require_hvs_enabled(dev);
/* Disable vblank irq handling before crtc is disabled. */
-@@ -556,6 +559,9 @@ static void vc4_crtc_atomic_enable(struc
+@@ -557,6 +560,9 @@ static void vc4_crtc_atomic_enable(struc
struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, new_state);
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
*/
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -534,9 +534,6 @@ static void vc4_plane_calc_load(struct d
+@@ -535,9 +535,6 @@ static void vc4_plane_calc_load(struct d
struct vc4_dev *vc4;
vc4 = to_vc4_dev(state->plane->dev);
+++ /dev/null
-From 5afb722d255335954c6b67470e0d261ea5d5ab7a Mon Sep 17 00:00:00 2001
-From: kFYatek <4499762+kFYatek@users.noreply.github.com>
-Date: Wed, 23 Jun 2021 01:11:26 +0200
-Subject: [PATCH] drm/vc4: Fix timings for interlaced modes
-
-Increase the number of post-sync blanking lines on odd fields instead of
-decreasing it on even fields. This makes the total number of lines
-properly match the modelines.
-
-Additionally fix the value of PV_VCONTROL_ODD_DELAY, which did not take
-pixels_per_clock into account, causing some displays to invert the
-fields when driven by bcm2711.
-
-Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 7 ++++---
- drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++------
- 2 files changed, 10 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -342,7 +342,8 @@ static void vc4_crtc_config_pv(struct dr
- PV_HORZB_HACTIVE));
-
- CRTC_WRITE(PV_VERTA,
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlace,
- PV_VERTA_VBP) |
- VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
- PV_VERTA_VSYNC));
-@@ -354,7 +355,7 @@ static void vc4_crtc_config_pv(struct dr
- if (interlace) {
- CRTC_WRITE(PV_VERTA_EVEN,
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end - 1,
-+ mode->crtc_vsync_end,
- PV_VERTA_VBP) |
- VC4_SET_FIELD(mode->crtc_vsync_end -
- mode->crtc_vsync_start,
-@@ -374,7 +375,7 @@ static void vc4_crtc_config_pv(struct dr
- PV_VCONTROL_CONTINUOUS |
- (is_dsi ? PV_VCONTROL_DSI : 0) |
- PV_VCONTROL_INTERLACE |
-- VC4_SET_FIELD(mode->htotal * pixel_rep / 2,
-+ VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc),
- PV_VCONTROL_ODD_DELAY));
- CRTC_WRITE(PV_VSYNCD_EVEN, 0);
- } else {
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -736,12 +736,12 @@ static void vc4_hdmi_set_timings(struct
- VC4_HDMI_VERTA_VFP) |
- VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL));
- u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlaced,
- VC4_HDMI_VERTB_VBP));
- u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end -
-- interlaced,
-+ mode->crtc_vsync_end,
- VC4_HDMI_VERTB_VBP));
-
- HDMI_WRITE(HDMI_HORZA,
-@@ -782,12 +782,12 @@ static void vc5_hdmi_set_timings(struct
- VC5_HDMI_VERTA_VFP) |
- VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL));
- u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
-+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-+ interlaced,
- VC4_HDMI_VERTB_VBP));
- u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end -
-- interlaced,
-+ mode->crtc_vsync_end,
- VC4_HDMI_VERTB_VBP));
- unsigned char gcp;
- bool gcp_en;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -611,12 +611,12 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -613,12 +613,12 @@ static void vc4_hdmi_encoder_post_crtc_d
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, 0);
vc4_hdmi_disable_scrambling(encoder);
}
-@@ -626,12 +626,12 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -628,12 +628,12 @@ static void vc4_hdmi_encoder_post_crtc_p
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
int ret;
clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
if (vc4_hdmi->bvb_req)
clk_request_done(vc4_hdmi->bvb_req);
-@@ -1011,6 +1011,7 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1013,6 +1013,7 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_WRITE(HDMI_VID_CTL,
VC4_HD_VID_CTL_ENABLE |
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -909,23 +909,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -911,23 +911,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
return;
}
vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate);
if (IS_ERR(vc4_hdmi->hsm_req)) {
DRM_ERROR("Failed to set HSM clock rate: %ld\n", PTR_ERR(vc4_hdmi->hsm_req));
-@@ -1141,6 +1125,39 @@ static const struct drm_encoder_helper_f
+@@ -1143,6 +1127,39 @@ static const struct drm_encoder_helper_f
.enable = vc4_hdmi_encoder_enable,
};
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -168,6 +168,8 @@ static void vc4_hdmi_cec_update_clk_div(
+@@ -170,6 +170,8 @@ static void vc4_hdmi_cec_update_clk_div(
static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {}
#endif
static enum drm_connector_status
vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
-@@ -197,6 +199,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -199,6 +201,8 @@ vc4_hdmi_connector_detect(struct drm_con
}
}
pm_runtime_put(&vc4_hdmi->pdev->dev);
return connector_status_connected;
}
-@@ -543,9 +547,13 @@ static bool vc4_hdmi_supports_scrambling
+@@ -545,9 +549,13 @@ static bool vc4_hdmi_supports_scrambling
static void vc4_hdmi_enable_scrambling(struct drm_encoder *encoder)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -901,6 +901,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -903,6 +903,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
if (ret < 0) {
DRM_ERROR("Failed to retain power domain: %d\n", ret);
return;
}
-@@ -908,12 +909,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -910,12 +911,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
if (ret) {
DRM_ERROR("Failed to set pixel clock rate: %d\n", ret);
return;
}
-@@ -921,6 +924,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -923,6 +926,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate);
if (IS_ERR(vc4_hdmi->hsm_req)) {
DRM_ERROR("Failed to set HSM clock rate: %ld\n", PTR_ERR(vc4_hdmi->hsm_req));
return;
}
-@@ -942,6 +946,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -944,6 +948,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
clk_request_done(vc4_hdmi->hsm_req);
clk_disable_unprepare(vc4_hdmi->hsm_clock);
clk_disable_unprepare(vc4_hdmi->pixel_clock);
return;
}
-@@ -953,6 +958,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -955,6 +960,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
clk_request_done(vc4_hdmi->hsm_req);
clk_disable_unprepare(vc4_hdmi->hsm_clock);
clk_disable_unprepare(vc4_hdmi->pixel_clock);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -924,6 +924,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -926,6 +926,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate);
if (IS_ERR(vc4_hdmi->hsm_req)) {
DRM_ERROR("Failed to set HSM clock rate: %ld\n", PTR_ERR(vc4_hdmi->hsm_req));
--- a/drivers/gpu/drm/vc4/vc4_drv.c
+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -258,6 +258,18 @@ const struct of_device_id vc4_dma_range_
+@@ -258,6 +258,18 @@ static const struct of_device_id vc4_dma
{}
};
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -364,7 +364,8 @@ static int vc4_hdmi_connector_init(struc
+@@ -366,7 +366,8 @@ static int vc4_hdmi_connector_init(struc
}
static int vc4_hdmi_stop_packet(struct drm_encoder *encoder,
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
u32 packet_id = type - 0x80;
-@@ -372,6 +373,9 @@ static int vc4_hdmi_stop_packet(struct d
+@@ -374,6 +375,9 @@ static int vc4_hdmi_stop_packet(struct d
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
HDMI_READ(HDMI_RAM_PACKET_CONFIG) & ~BIT(packet_id));
return wait_for(!(HDMI_READ(HDMI_RAM_PACKET_STATUS) &
BIT(packet_id)), 100);
}
-@@ -400,7 +404,7 @@ static void vc4_hdmi_write_infoframe(str
+@@ -402,7 +406,7 @@ static void vc4_hdmi_write_infoframe(str
if (len < 0)
return;
if (ret) {
DRM_ERROR("Failed to wait for infoframe to go idle: %d\n", ret);
return;
-@@ -1284,7 +1288,7 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1286,7 +1290,7 @@ static void vc4_hdmi_audio_reset(struct
int ret;
vc4_hdmi->audio.streaming = false;
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -1363,11 +1363,6 @@ static const struct drm_plane_helper_fun
+@@ -1364,11 +1364,6 @@ static const struct drm_plane_helper_fun
.atomic_async_update = vc4_plane_atomic_async_update,
};
static bool vc4_format_mod_supported(struct drm_plane *plane,
uint32_t format,
uint64_t modifier)
-@@ -1425,7 +1420,7 @@ static bool vc4_format_mod_supported(str
+@@ -1426,7 +1421,7 @@ static bool vc4_format_mod_supported(str
static const struct drm_plane_funcs vc4_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -1226,7 +1226,6 @@ static void vc4_plane_atomic_async_updat
+@@ -1227,7 +1227,6 @@ static void vc4_plane_atomic_async_updat
plane->state->src_y = state->src_y;
plane->state->src_w = state->src_w;
plane->state->src_h = state->src_h;
/* -----------------------------------------------------------------------------
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -1642,7 +1642,6 @@ static const struct drm_crtc_funcs vop_c
+@@ -1645,7 +1645,6 @@ static const struct drm_crtc_funcs vop_c
.disable_vblank = vop_crtc_disable_vblank,
.set_crc_source = vop_crtc_set_crc_source,
.verify_crc_source = vop_crtc_verify_crc_source,
+++ /dev/null
-From 0427e8464446a03d287e7ec8b7bb74dd983b6988 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Mon, 12 Jul 2021 12:27:59 +0100
-Subject: [PATCH] drm/vc4: Fix margin calculations for the right/bottom
- edges
-
-The calculations clipped the right/bottom edge of the clipped
-range based on the left/top margins.
-
-Fixes: 666e73587f90 ("drm/vc4: Take margin setup into account when updating planes")
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_plane.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -310,16 +310,16 @@ static int vc4_plane_margins_adj(struct
- adjhdisplay,
- crtc_state->mode.hdisplay);
- vc4_pstate->crtc_x += left;
-- if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - left)
-- vc4_pstate->crtc_x = crtc_state->mode.hdisplay - left;
-+ if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - right)
-+ vc4_pstate->crtc_x = crtc_state->mode.hdisplay - right;
-
- adjvdisplay = crtc_state->mode.vdisplay - (top + bottom);
- vc4_pstate->crtc_y = DIV_ROUND_CLOSEST(vc4_pstate->crtc_y *
- adjvdisplay,
- crtc_state->mode.vdisplay);
- vc4_pstate->crtc_y += top;
-- if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - top)
-- vc4_pstate->crtc_y = crtc_state->mode.vdisplay - top;
-+ if (vc4_pstate->crtc_y > crtc_state->mode.vdisplay - bottom)
-+ vc4_pstate->crtc_y = crtc_state->mode.vdisplay - bottom;
-
- vc4_pstate->crtc_w = DIV_ROUND_CLOSEST(vc4_pstate->crtc_w *
- adjhdisplay,
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -1433,5 +1433,5 @@ subdir-y := overlays
+@@ -1434,5 +1434,5 @@ subdir-y := overlays
# Enable fixups to support overlays on BCM2835 platforms
ifeq ($(CONFIG_ARCH_BCM2835),y)
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
-@@ -305,6 +305,7 @@ static int parse_redboot_partitions(stru
+@@ -306,6 +306,7 @@ static int parse_redboot_partitions(stru
static const struct of_device_id mtd_parser_redboot_of_match_table[] = {
{ .compatible = "redboot-fis" },
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
-@@ -2737,6 +2737,11 @@ serial8250_do_set_termios(struct uart_po
+@@ -2716,6 +2716,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;
projects / openwrt / staging / blocktrron.git / commitdiff