clk: imx7d: Add the clock for SDMA
authorFabio Estevam <fabio.estevam@nxp.com>
Fri, 12 Aug 2016 18:26:54 +0000 (15:26 -0300)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 19 Aug 2016 19:53:36 +0000 (12:53 -0700)
Add IMX7D_SDMA_CORE_CLK clock so that SDMA can be functional.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/imx/clk-imx7d.c

index 92579723afb09d444258d48f0a280b4f439f67a1..c24677d764bbe7ce333818a98803bb2a5e48e296 100644 (file)
@@ -779,6 +779,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0);
        clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0);
        clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4420, 0);
+       clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", "ahb_root_clk", base + 0x4480, 0);
        clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", "pcie_ctrl_post_div", base + 0x4600, 0);
        clks[IMX7D_PCIE_PHY_ROOT_CLK] = imx_clk_gate4("pcie_phy_root_clk", "pcie_phy_post_div", base + 0x4600, 0);
        clks[IMX7D_EPDC_PIXEL_ROOT_CLK] = imx_clk_gate4("epdc_pixel_root_clk", "epdc_pixel_post_div", base + 0x44a0, 0);