ath79: add support for Senao Engenius ESR1750
authorMichael Pratt <mcpratt@pm.me>
Sun, 22 Jan 2023 08:21:53 +0000 (03:21 -0500)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 12 Feb 2023 17:07:31 +0000 (18:07 +0100)
FCC ID: A8J-ESR1750

Engenius ESR1750 is an indoor wireless router with
a gigabit ethernet switch, dual-band wireless,
internal antenna plates, and a USB 2.0 port

**Specification:**

  - QCA9558 SOC 2.4 GHz, 3x3
  - QCA9880 WLAN PCIe mini card, 5 GHz, 3x3
  - QCA8337N SW 4 ports LAN, 1 port WAN
  - 40 MHz clock
  - 16 MB FLASH MX25L12845EMI-10G
  - 2x 64 MB RAM
  - UART at J1 populated, RX grounded
  - 6 internal antenna plates (omni-directional)
  - 5 LEDs, 1 button (power, 2G, 5G, WAN, WPS) (reset)

**MAC addresses:**

  Base MAC address labeled as "MAC ADDRESS"
  MAC "wanaddr" is similar to "ethaddr"

  eth0 *:58 MAC u-boot-env ethaddr
  phy0 *:58 MAC u-boot-env ethaddr
  phy1 *:59 --- u-boot-env ethaddr +1
  WAN  *:10:58  u-boot-env wanaddr

**Serial Access:**

  RX on the board for UART is shorted to ground by resistor R176
  therefore it must be removed to use the console
  but it is not necessary to remove to view boot log

  optionally, R175 can be replaced with a solder bridge short

  the resistors R175 and R176 are next to the UART RX pin

**Installation:**

  Method 1: Firmware upgrade page

    NOTE: ESR1750 might require the factory.bin
      for ESR1200 instead, OEM provides 1 image for both.

    OEM webpage at 192.168.0.1
    username and password "admin"
    Navigate to Settings (gear icon) --> Tools --> Firmware
    select the factory.bin image
    confirm and wait 3 minutes

  Method 2: TFTP recovery

    Follow TFTP instructions using initramfs.bin
    use sysupgrade.bin to flash using openwrt web interface

**Return to OEM:**

  MTD partitions should be backed up before flashing
  using TFTP to boot openwrt without overwriting flash

  Alternatively, it is possible to edit OEM firmware images
  to flash MTD partitions in openwrt to restore OEM firmware
  by removing the OEM header and writing the rest to "firmware"

**TFTP recovery:**

  Requires serial console, reset button does nothing at boot

  rename initramfs.bin to 'uImageESR1200'
  make available on TFTP server at 192.168.99.8
  power board, interrupt boot by pressing '4' rapidly
  execute tftpboot and bootm

**Note on ETH switch registers**

  Registers must be written to the ethernet switch
  in order to set up the switch's MAC interface.
  U-boot can write the registers on it's own
  which is needed, for example, in a TFTP transfer.

  The register bits from OEM for the QCA8337 switch
  can be read from interrupted boot (tftpboot, bootm)
  by adding print lines in the switch driver ar8327.c
  before 'qca,ar8327-initvals' is parsed from DTS and written.
  for example:

    pr_info("0x04 %08x\n", ar8xxx_read(priv, AR8327_REG_PAD0_MODE));

Signed-off-by: Michael Pratt <mcpratt@pm.me>
target/linux/ath79/dts/qca9558_engenius_esr1750.dts [new file with mode: 0644]
target/linux/ath79/generic/base-files/etc/board.d/02_network
target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
target/linux/ath79/generic/base-files/lib/preinit/10_fix_eth_mac.sh
target/linux/ath79/image/generic.mk

diff --git a/target/linux/ath79/dts/qca9558_engenius_esr1750.dts b/target/linux/ath79/dts/qca9558_engenius_esr1750.dts
new file mode 100644 (file)
index 0000000..4cfdfc1
--- /dev/null
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca955x_senao_router-dual.dtsi"
+
+/ {
+       compatible = "engenius,esr1750", "qca,qca9558";
+       model = "EnGenius ESR1750";
+
+       aliases {
+               led-boot = &led_power;
+               led-failsafe = &led_power;
+               led-running = &led_power;
+               led-upgrade = &led_power;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_power: power {
+                       label = "amber:power";
+                       gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
+               };
+
+               wlan2g {
+                       label = "blue:wlan2g";
+                       gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy1tpt";
+               };
+
+               wlan5g {
+                       label = "blue:wlan5g";
+                       gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               wps_amber {
+                       label = "amber:wps";
+                       gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
+               };
+
+               wps_blue {
+                       label = "blue:wps";
+                       gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&phy0 {
+       qca,mib-poll-interval = <500>;
+
+       qca,ar8327-initvals = <
+               0x04 0x87680000 /* PORT0 PAD MODE CTRL */
+               0x10 0x40000000 /* POWER_ON_STRAP */
+               0x50 0xcf35cf35 /* LED_CTRL0 */
+               0x54 0xcf35cf35 /* LED_CTRL1 */
+               0x58 0xcf35cf35 /* LED_CTRL2 */
+               0x5c 0x03ffff00 /* LED_CTRL3 */
+               0x7c 0x0000007e /* PORT0_STATUS */
+       >;
+};
+
+&usb_phy1 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
+&wmac {
+       nvmem-cells = <&calibration_art_1000>;
+       nvmem-cell-names = "calibration";
+};
+
+&ath10k_0 {
+       nvmem-cells = <&calibration_art_5000>;
+       nvmem-cell-names = "calibration";
+};
index 14baee3ae7b41f2ae46ba7ca48afa2f9e864a514..fbdd8c493e6c5a5b9bad27ec8e7f6b8e7b133b4a 100644 (file)
@@ -287,6 +287,7 @@ ath79_setup_interfaces()
        dlink,dir-842-c3|\
        dlink,dir-859-a1|\
        engenius,epg5000|\
+       engenius,esr1750|\
        engenius,esr900|\
        sitecom,wlr-7100|\
        tplink,archer-c2-v3|\
@@ -667,6 +668,7 @@ ath79_setup_macs()
                label_mac=$lan_mac
                ;;
        engenius,epg5000|\
+       engenius,esr1750|\
        engenius,esr900)
                lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
                wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
index 42fa44c30e47f6899749aecfa42501fea4f4f049..1290c8b5fdc2bf11dcf73ccfc09f4a9da68e3825 100644 (file)
@@ -35,6 +35,7 @@ case "$board" in
                [ "$PHYNBR" -eq 1 ] && \
                        mtd_get_mac_ascii bdcfg "wlanmac" > /sys${DEVPATH}/macaddress
                ;;
+       engenius,esr1750|\
        engenius,esr900)
                macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" "$PHYNBR" > /sys${DEVPATH}/macaddress
                ;;
index 50855f543f445aa45922a6abdd7491d721224daa..b98b047c937194f1f1070062dc8a751c8d052643 100644 (file)
@@ -12,6 +12,7 @@ preinit_set_mac_address() {
                ip link set dev eth0 address $(mtd_get_mac_ascii bdcfg "lanmac")
                ip link set dev eth1 address $(mtd_get_mac_ascii bdcfg "wanmac")
                ;;
+       engenius,esr1750|\
        engenius,esr900)
                ip link set dev eth0 address $(mtd_get_mac_ascii u-boot-env ethaddr)
                ;;
index 47a8b0fe79f4eab18ec53b52890910d96f56397b..6212fc602ef631e082bd8f2d30b8e3b09affafdf 100644 (file)
@@ -1299,6 +1299,20 @@ define Device/engenius_epg5000
 endef
 TARGET_DEVICES += engenius_epg5000
 
+define Device/engenius_esr1750
+  SOC := qca9558
+  DEVICE_VENDOR := EnGenius
+  DEVICE_MODEL := ESR1750
+  DEVICE_PACKAGES := ath10k-firmware-qca988x-ct kmod-ath10k-ct kmod-usb2
+  IMAGE_SIZE := 14656k
+  IMAGES += factory.dlf
+  IMAGE/factory.dlf := append-kernel | pad-to $$$$(BLOCKSIZE) | \
+       append-rootfs | pad-rootfs | check-size | \
+       senao-header -r 0x101 -p 0x62 -t 2
+  SUPPORTED_DEVICES += esr1750 esr1200 engenius,esr1200
+endef
+TARGET_DEVICES += engenius_esr1750
+
 define Device/engenius_esr900
   SOC := qca9558
   DEVICE_VENDOR := EnGenius