Tegra186: remove support for Quasi System power off (SC8) state

This patch removes support for the SC8 power state as the feature is no
longer required for Tegra186 projects.

Change-Id: I622a5ddcffe025b9b798801d09bbb856853befd7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
index 06d6cbb21082f0365e53d39b6190867f35aa1970..3a1227a2dc2db8218ddb22e752e2211e29463715 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
@@ -45,9 +45,6 @@ static struct t18x_psci_percpu_data {
        unsigned int wake_time;
 } __aligned(CACHE_WRITEBACK_GRANULE) percpu_data[PLATFORM_CORE_COUNT];
 
-/* System power down state */
-uint32_t tegra186_system_powerdn_state = TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF;
-
 int32_t tegra_soc_validate_power_state(unsigned int power_state,
                                        psci_power_state_t *req_state)
 {
@@ -362,48 +359,8 @@ int tegra_soc_pwr_domain_off(const psci_power_state_t *target_state)
 
 __dead2 void tegra_soc_prepare_system_off(void)
 {
-       mce_cstate_info_t cstate_info = { 0 };
-       uint32_t val;
-
-       if (tegra186_system_powerdn_state == TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF) {
-
-               /* power off the entire system */
-               mce_enter_ccplex_state(tegra186_system_powerdn_state);
-
-       } else if (tegra186_system_powerdn_state == TEGRA_ARI_SYSTEM_SC8) {
-
-               /* Prepare for quasi power down */
-               cstate_info.cluster = TEGRA_ARI_CLUSTER_CC7;
-               cstate_info.system = TEGRA_ARI_SYSTEM_SC8;
-               cstate_info.system_state_force = 1;
-               cstate_info.update_wake_mask = 1;
-               mce_update_cstate_info(&cstate_info);
-
-               /* loop until other CPUs power down */
-               do {
-                       val = mce_command_handler(MCE_CMD_IS_SC7_ALLOWED,
-                                       TEGRA_ARI_CORE_C7,
-                                       MCE_CORE_SLEEP_TIME_INFINITE,
-                                       0);
-               } while (val == 0);
-
-               /* Enter quasi power down state */
-               (void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
-                       TEGRA_ARI_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);
-
-               /* disable GICC */
-               tegra_gic_cpuif_deactivate();
-
-               /* power down core */
-               prepare_cpu_pwr_dwn();
-
-               /* flush L1/L2 data caches */
-               dcsw_op_all(DCCISW);
-
-       } else {
-               ERROR("%s: unsupported power down state (%d)\n", __func__,
-                       tegra186_system_powerdn_state);
-       }
+       /* power off the entire system */
+       mce_enter_ccplex_state(TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF);
 
        wfi();
 

diff --git a/plat/nvidia/tegra/soc/t186/plat_sip_calls.c b/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
index 2e22123bdbab68d20e552c57864e1bae87c1602c..955029e234ec7bc2a68ce9f1bf3064f167e8e4bc 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
+++ b/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
@@ -20,8 +20,6 @@
 #include <t18x_ari.h>
 #include <tegra_private.h>
 
-extern uint32_t tegra186_system_powerdn_state;
-
 /*******************************************************************************
  * Offset to read the ref_clk counter value
  ******************************************************************************/
@@ -30,7 +28,6 @@ extern uint32_t tegra186_system_powerdn_state;
 /*******************************************************************************
  * Tegra186 SiP SMCs
  ******************************************************************************/
-#define TEGRA_SIP_SYSTEM_SHUTDOWN_STATE                        0xC2FFFE01
 #define TEGRA_SIP_GET_ACTMON_CLK_COUNTERS              0xC2FFFE02
 #define TEGRA_SIP_MCE_CMD_ENTER_CSTATE                 0xC2FFFF00
 #define TEGRA_SIP_MCE_CMD_UPDATE_CSTATE_INFO           0xC2FFFF01
@@ -115,33 +112,6 @@ int plat_sip_handler(uint32_t smc_fid,
 
                return 0;
 
-       case TEGRA_SIP_SYSTEM_SHUTDOWN_STATE:
-
-               /* clean up the high bits */
-               x1 = (uint32_t)x1;
-
-               /*
-                * SC8 is a special Tegra186 system state where the CPUs and
-                * DRAM are powered down but the other subsystem is still
-                * alive.
-                */
-               if ((x1 == TEGRA_ARI_SYSTEM_SC8) ||
-                   (x1 == TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF)) {
-
-                       tegra186_system_powerdn_state = x1;
-                       flush_dcache_range(
-                               (uintptr_t)&tegra186_system_powerdn_state,
-                               sizeof(tegra186_system_powerdn_state));
-
-               } else {
-
-                       ERROR("%s: unhandled powerdn state (%d)\n", __func__,
-                               (uint32_t)x1);
-                       return -ENOTSUP;
-               }
-
-               return 0;
-
        /*
         * This function ID reads the Activity monitor's core/ref clock
         * counter values for a core/cluster.