SPEAr: Add basic arch related support for SPEAr SoCs
authorVipin KUMAR <vipin.kumar@st.com>
Mon, 7 May 2012 07:36:45 +0000 (13:06 +0530)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 7 Jul 2012 12:07:40 +0000 (14:07 +0200)
Earlier, architecture specific init code was mixed with board initialization
code in board/spear/... This patch updates architecture support for SPEAr in
latest u-boot and prints the SoC information.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
arch/arm/cpu/arm926ejs/spear/Makefile
arch/arm/cpu/arm926ejs/spear/cpu.c [new file with mode: 0644]
arch/arm/include/asm/arch-spear/spr_misc.h
include/configs/spear-common.h

index f32ec4ccf386e6f1e915436b9b2df9bf994975cc..46923a42fb139fda511d77794712119ae07ba527 100644 (file)
@@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(SOC).o
 
-COBJS  := reset.o \
+COBJS  := cpu.o \
+          reset.o \
           timer.o
 SOBJS  :=
 
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c
new file mode 100644 (file)
index 0000000..9e074bc
--- /dev/null
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2010
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spr_misc.h>
+
+int arch_cpu_init(void)
+{
+       struct misc_regs *const misc_p =
+           (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+       u32 periph1_clken;
+
+       periph1_clken = readl(&misc_p->periph1_clken);
+
+#if defined(CONFIG_SPEAR3XX)
+       periph1_clken |= MISC_GPT2ENB;
+#elif defined(CONFIG_SPEAR600)
+       periph1_clken |= MISC_GPT3ENB;
+#endif
+
+#if defined(CONFIG_PL011_SERIAL)
+       periph1_clken |= MISC_UART0ENB;
+#endif
+#if defined(CONFIG_DESIGNWARE_ETH)
+       periph1_clken |= MISC_ETHENB;
+#endif
+#if defined(CONFIG_DW_UDC)
+       periph1_clken |= MISC_USBDENB;
+#endif
+#if defined(CONFIG_DW_I2C)
+       periph1_clken |= MISC_I2CENB;
+#endif
+#if defined(CONFIG_ST_SMI)
+       periph1_clken |= MISC_SMIENB;
+#endif
+#if defined(CONFIG_NAND_FSMC)
+       periph1_clken |= MISC_FSMCENB;
+#endif
+
+       writel(periph1_clken, &misc_p->periph1_clken);
+       return 0;
+}
+
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+#ifdef CONFIG_SPEAR300
+       printf("CPU:   SPEAr300\n");
+#elif defined(CONFIG_SPEAR310)
+       printf("CPU:   SPEAr310\n");
+#elif defined(CONFIG_SPEAR320)
+       printf("CPU:   SPEAr320\n");
+#elif defined(CONFIG_SPEAR600)
+       printf("CPU:   SPEAr600\n");
+#else
+#error CPU not supported in spear platform
+#endif
+       return 0;
+}
+#endif
index 8b96d9b52aee3e678418d45dc62d160ebd4756b2..b10c72607a5b8aac410acdadac5b003c16454e90 100644 (file)
@@ -126,5 +126,12 @@ struct misc_regs {
 
 /* PERIPH1_CLKEN, PERIPH1_RST value */
 #define MISC_USBDENB                   0x01000000
+#define MISC_ETHENB                    0x00800000
+#define MISC_SMIENB                    0x00200000
+#define MISC_GPT3ENB                   0x00010000
+#define MISC_GPT2ENB                   0x00000800
+#define MISC_FSMCENB                   0x00000200
+#define MISC_I2CENB                    0x00000080
+#define MISC_UART0ENB                  0x00000008
 
 #endif
index 669d83eb7ebd4c91c72af4a3e06f8b242a19f7bb..3a238945dcf43844783e81086aff4f50d83e0e6c 100644 (file)
 #define CONFIG_ENV_SIZE                                0x02000
 
 /* Miscellaneous configurable options */
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_BOOT_PARAMS_ADDR                        0x00000100
 #define CONFIG_CMDLINE_TAG                     1
 #define CONFIG_SETUP_MEMORY_TAGS               1