drm/amdgpu: move amdgpu_vcn structure to vcn header
authorLeo Liu <leo.liu@amd.com>
Thu, 11 May 2017 20:27:33 +0000 (16:27 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 21:41:27 +0000 (17:41 -0400)
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

index 68817e60e7870e37741db0eec7ea336c56a14052..8274d8e23e98202f1d1ff45c8c5d8ef72ba566fa 100644 (file)
@@ -62,6 +62,7 @@
 #include "amdgpu_acp.h"
 #include "amdgpu_uvd.h"
 #include "amdgpu_vce.h"
+#include "amdgpu_vcn.h"
 
 #include "gpu_scheduler.h"
 #include "amdgpu_virt.h"
@@ -1180,31 +1181,6 @@ void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb);
 
 void amdgpu_get_pcie_info(struct amdgpu_device *adev);
 
-/*
- * VCN
- */
-#define AMDGPU_VCN_STACK_SIZE          (200*1024)
-#define AMDGPU_VCN_HEAP_SIZE           (256*1024)
-#define AMDGPU_VCN_SESSION_SIZE                (50*1024)
-#define AMDGPU_VCN_FIRMWARE_OFFSET     256
-#define AMDGPU_VCN_MAX_ENC_RINGS       3
-
-struct amdgpu_vcn {
-       struct amdgpu_bo        *vcpu_bo;
-       void                    *cpu_addr;
-       uint64_t                gpu_addr;
-       unsigned                fw_version;
-       void                    *saved_bo;
-       struct delayed_work     idle_work;
-       const struct firmware   *fw;    /* VCN firmware */
-       struct amdgpu_ring      ring_dec;
-       struct amdgpu_ring      ring_enc[AMDGPU_VCN_MAX_ENC_RINGS];
-       struct amdgpu_irq_src   irq;
-       struct amd_sched_entity entity_dec;
-       struct amd_sched_entity entity_enc;
-       uint32_t                srbm_soft_reset;
-};
-
 /*
  * SDMA
  */
index ec4d7ca7ed61ae81de96b289e0175dbb809ad58e..2fd22a5d23b4270796554ed038f86a6c52834865 100644 (file)
 #ifndef __AMDGPU_VCN_H__
 #define __AMDGPU_VCN_H__
 
+#define AMDGPU_VCN_STACK_SIZE          (200*1024)
+#define AMDGPU_VCN_HEAP_SIZE           (256*1024)
+#define AMDGPU_VCN_SESSION_SIZE                (50*1024)
+#define AMDGPU_VCN_FIRMWARE_OFFSET     256
+#define AMDGPU_VCN_MAX_ENC_RINGS       3
+
+struct amdgpu_vcn {
+       struct amdgpu_bo        *vcpu_bo;
+       void                    *cpu_addr;
+       uint64_t                gpu_addr;
+       unsigned                fw_version;
+       void                    *saved_bo;
+       struct delayed_work     idle_work;
+       const struct firmware   *fw;    /* VCN firmware */
+       struct amdgpu_ring      ring_dec;
+       struct amdgpu_ring      ring_enc[AMDGPU_VCN_MAX_ENC_RINGS];
+       struct amdgpu_irq_src   irq;
+       struct amd_sched_entity entity_dec;
+       struct amd_sched_entity entity_enc;
+       uint32_t                srbm_soft_reset;
+};
+
 int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
 int amdgpu_vcn_sw_fini(struct amdgpu_device *adev);
 int amdgpu_vcn_suspend(struct amdgpu_device *adev);