#define RX_STATUS_OF BIT(2) /* Rx Overflow */
#define RX_STATUS_BE BIT(3) /* Bus Error */
-#define MII_CTRL_IF_MASK 3
#define MII_CTRL_SPEED_SHIFT 4
#define MII_CTRL_SPEED_MASK 3
#define MII_CTRL_SPEED_10 0
return __raw_readl(ag->mii_ctrl);
}
-static inline void ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
- unsigned int mii_if)
-{
- u32 t;
-
- t = ag71xx_mii_ctrl_rr(ag);
- t &= ~(MII_CTRL_IF_MASK);
- t |= (mii_if & MII_CTRL_IF_MASK);
- ag71xx_mii_ctrl_wr(ag, t);
-}
-
static inline void ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
unsigned int speed)
{
/* setup max frame length */
ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN);
- /* setup MII interface type */
- ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
-
/* setup FIFO configuration registers */
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
if (pdata->is_ar724x) {