drm/amdgpu/sdma5: set clock gating for navi14
authorXiaojie Yuan <xiaojie.yuan@amd.com>
Fri, 22 Mar 2019 05:14:25 +0000 (13:14 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Jul 2019 19:17:59 +0000 (14:17 -0500)
same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

index dbfb1845297d0b2130a2f996ed5a840988ce61af..89893261f145109cb6fa3c7fe35a9882f5c57eb1 100644 (file)
@@ -1493,6 +1493,7 @@ static int sdma_v5_0_set_clockgating_state(void *handle,
 
        switch (adev->asic_type) {
        case CHIP_NAVI10:
+       case CHIP_NAVI14:
                sdma_v5_0_update_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE ? true : false);
                sdma_v5_0_update_medium_grain_light_sleep(adev,