bnx2: Add missing memory barrier in bnx2_start_xmit()

Sync DMA descriptor before hitting the TX mailbox for weak memory model
CPUs.

There has been discussions several years ago about this.  Some believe
that writel() should guarantee ordering.  Others want explicit barriers
if necessary.  Today writel() does not have the ordering guarantee and
many other drivers use explicit barriers.

Signed-off-by: Vlad Zolotarov <vlad@scalemp.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c
index 2ab31daef80ff795a6cf009c0014c8166912d6d9..7105989ba65804859f38e50a5ef71df2e4fef024 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2.c
+++ b/drivers/net/ethernet/broadcom/bnx2.c
@@ -6565,6 +6565,9 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
        }
        txbd->tx_bd_vlan_tag_flags |= TX_BD_FLAGS_END;
 
+       /* Sync BD data before updating TX mailbox */
+       wmb();
+
        netdev_tx_sent_queue(txq, skb->len);
 
        prod = NEXT_TX_BD(prod);