drm/amdgpu: Add place holder for soc15 asic init on emulation
authorShaoyun Liu <Shaoyun.Liu@amd.com>
Thu, 1 Feb 2018 23:13:23 +0000 (18:13 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Feb 2018 19:19:49 +0000 (14:19 -0500)
Add common smu_soc_asic_init function to emulate the sillicon post sequence

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/Makefile
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/emu_soc.c [new file with mode: 0644]

index d6e5b727385304e47d0cb3e6e418dcbce8f26a89..be5e5acc3e39aca875fa0003a52e73e6255c0c5c 100644 (file)
@@ -63,7 +63,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
 amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o
 
 amdgpu-y += \
-       vi.o mxgpu_vi.o nbio_v6_1.o soc15.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o
+       vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o
 
 # add GMC block
 amdgpu-y += \
index 8ad0d48a1fe39d98682483e20dda1d8a54774be0..44cf4b9a57034f10a435a08c417cfd6309fbdf12 100644 (file)
@@ -1657,6 +1657,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v);
 bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
 
+int emu_soc_asic_init(struct amdgpu_device *adev);
+
 /*
  * Registers read & write functions.
  */
index c3e2235cb430c0813de54457c651af269b8008c9..c9a8cf87934ee4385fb63e1bf25af9779dfc3131 100644 (file)
@@ -1311,19 +1311,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
                }
                adev->ip_blocks[i].status.sw = true;
 
-               if (amdgpu_emu_mode == 1) {
-                       /* Need to do common hw init first on emulation  */
-                       if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {
-                               r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev);
-                               if (r) {
-                                       DRM_ERROR("hw_init of IP block <%s> failed %d\n",
-                                               adev->ip_blocks[i].version->funcs->name, r);
-                                       return r;
-                               }
-                               adev->ip_blocks[i].status.hw = true;
-                       }
-               }
-
                /* need to do gmc hw init early so we can allocate gpu mem */
                if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
                        r = amdgpu_device_vram_scratch_init(adev);
@@ -1902,8 +1889,11 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        if (runtime)
                vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain);
 
-       if (amdgpu_emu_mode == 1)
+       if (amdgpu_emu_mode == 1) {
+               /* post the asic on emulation mode */
+               emu_soc_asic_init(adev);
                goto fence_driver_init;
+       }
 
        /* Read BIOS */
        if (!amdgpu_get_bios(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/emu_soc.c b/drivers/gpu/drm/amd/amdgpu/emu_soc.c
new file mode 100644 (file)
index 0000000..d72c25c
--- /dev/null
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include "amdgpu.h"
+#include "soc15.h"
+
+#include "soc15_common.h"
+#include "soc15_hw_ip.h"
+
+int emu_soc_asic_init(struct amdgpu_device *adev)
+{
+       return 0;
+}
+