num = fm_eth->num;
#ifdef CONFIG_SYS_FMAN_V3
+ if (fm_eth->type == FM_ETH_10G_E)
+ num += 8;
base = ®->memac[num].fm_memac;
phyregs = ®->memac[num].fm_memac_mdio;
#else
#if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
FM_TGEC_INFO_INITIALIZER(1, 1),
#endif
+#if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
+ FM_TGEC_INFO_INITIALIZER(1, 2),
+#endif
#if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
FM_TGEC_INFO_INITIALIZER(2, 1),
#endif
+#if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
+ FM_TGEC_INFO_INITIALIZER(2, 2),
+#endif
};
int fm_standard_init(bd_t *bis)
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
- if ((port == FM1_10GEC1 || port == FM1_10GEC2)
- && (is_serdes_configured(XAUI_FM1)))
+ if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
+ ((is_serdes_configured(XAUI_FM1_MAC9)) ||
+ (is_serdes_configured(XAUI_FM1_MAC10)) ||
+ (is_serdes_configured(XFI_FM1_MAC9)) ||
+ (is_serdes_configured(XFI_FM1_MAC10))))
return PHY_INTERFACE_MODE_XGMII;
- if ((port == FM2_10GEC1 || port == FM2_10GEC2)
- && (is_serdes_configured(XAUI_FM2)))
+ if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
+ ((is_serdes_configured(XAUI_FM2_MAC9)) ||
+ (is_serdes_configured(XAUI_FM2_MAC10)) ||
+ (is_serdes_configured(XFI_FM2_MAC9)) ||
+ (is_serdes_configured(XFI_FM2_MAC10))))
return PHY_INTERFACE_MODE_XGMII;
#define FSL_CORENET_RCWSR13_EC1 0x60000000 /* bits 417..418 */
#define FM_TGEC_INFO_INITIALIZER(idx, n) \
{ \
- FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
+ FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \
.index = idx, \
.num = n - 1, \
.type = FM_ETH_10G_E, \
.rx_port_id = RX_PORT_10G_BASE + n - 1, \
.tx_port_id = TX_PORT_10G_BASE + n - 1, \
.compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
- offsetof(struct ccsr_fman, memac[n-1]),\
+ offsetof(struct ccsr_fman, memac[n-1+8]),\
}
#else
#define FM_DTSEC_INFO_INITIALIZER(idx, n) \