plat/arm/sgi: add secure memory support for sgi575 and sgiclarka
authorVijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Thu, 25 Oct 2018 16:50:24 +0000 (22:20 +0530)
committerVijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Wed, 21 Nov 2018 13:55:54 +0000 (19:25 +0530)
Remove the platform common plat_arm_security_setup function to allow
platform specific implementations of the security setup function
implemented in the board directory of the platform.

For use by secure software, configure region0 of DMC-620 trustzone
controller to protect the upper 16MB of memory of the first DRAM block
from non-secure accesses.

Change-Id: I9a8c19656702c4fa4f6917b3655b692d443bb568
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
plat/arm/board/sgi575/include/platform_def.h
plat/arm/board/sgi575/platform.mk
plat/arm/board/sgi575/sgi575_security.c [new file with mode: 0644]
plat/arm/board/sgiclarka/include/platform_def.h
plat/arm/board/sgiclarka/platform.mk
plat/arm/board/sgiclarka/sgiclarka_security.c [new file with mode: 0644]
plat/arm/css/sgi/sgi-common.mk
plat/arm/css/sgi/sgi_security.c [deleted file]

index 1870fc78aed86a1e830d8d8c7702b62fb2327006..c06a0a1fa8932dede1b340b92667aad26b851ee6 100644 (file)
@@ -8,11 +8,16 @@
 #define PLATFORM_DEF_H
 
 #include <sgi_base_platform_def.h>
+#include <utils_def.h>
 
 #define PLAT_ARM_CLUSTER_COUNT         2
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER   4
 #define CSS_SGI_MAX_PE_PER_CPU         1
 
-#define PLAT_CSS_MHU_BASE              0x45000000
+#define PLAT_CSS_MHU_BASE              UL(0x45000000)
+
+/* Base address of DMC-620 instances */
+#define SGI575_DMC620_BASE0            UL(0x4e000000)
+#define SGI575_DMC620_BASE1            UL(0x4e100000)
 
 #endif /* PLATFORM_DEF_H */
index 8df8b1292a1764400bfee12c1d136d20a143b2df..dd82d2975f61d37e3d666487a9b7f228b648b648 100644 (file)
@@ -14,7 +14,9 @@ SGI_CPU_SOURCES               :=      lib/cpus/aarch64/cortex_a75.S
 
 BL1_SOURCES            +=      ${SGI_CPU_SOURCES}
 
-BL2_SOURCES            +=      lib/utils/mem_region.c                  \
+BL2_SOURCES            +=      ${SGI575_BASE}/sgi575_security.c        \
+                               drivers/arm/tzc/tzc_dmc620.c            \
+                               lib/utils/mem_region.c                  \
                                plat/arm/common/arm_nor_psci_mem_protect.c
 
 BL31_SOURCES           +=      ${SGI_CPU_SOURCES}                      \
diff --git a/plat/arm/board/sgi575/sgi575_security.c b/plat/arm/board/sgi575/sgi575_security.c
new file mode 100644 (file)
index 0000000..7ccc59a
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <debug.h>
+#include <platform_def.h>
+#include <tzc_dmc620.h>
+
+uintptr_t sgi575_dmc_base[] = {
+       SGI575_DMC620_BASE0,
+       SGI575_DMC620_BASE1
+};
+
+static const tzc_dmc620_driver_data_t sgi575_plat_driver_data = {
+       .dmc_base = sgi575_dmc_base,
+       .dmc_count = ARRAY_SIZE(sgi575_dmc_base)
+};
+
+static const tzc_dmc620_acc_addr_data_t sgi575_acc_addr_data[] = {
+       {
+               .region_base = ARM_AP_TZC_DRAM1_BASE,
+               .region_top = ARM_AP_TZC_DRAM1_BASE + ARM_TZC_DRAM1_SIZE - 1,
+               .sec_attr = TZC_DMC620_REGION_S_RDWR
+       }
+};
+
+static const tzc_dmc620_config_data_t sgi575_plat_config_data = {
+       .plat_drv_data = &sgi575_plat_driver_data,
+       .plat_acc_addr_data = sgi575_acc_addr_data,
+       .acc_addr_count = ARRAY_SIZE(sgi575_acc_addr_data)
+};
+
+/* Initialize the secure environment */
+void plat_arm_security_setup(void)
+{
+       arm_tzc_dmc620_setup(&sgi575_plat_config_data);
+}
index abc48d84cf6da854f7164eba9ae070d07ef34a3c..ba6d0434bb7eb1f63aaa7eb160521017d107a189 100644 (file)
@@ -8,11 +8,16 @@
 #define PLATFORM_DEF_H
 
 #include <sgi_base_platform_def.h>
+#include <utils_def.h>
 
 #define PLAT_ARM_CLUSTER_COUNT         2
 #define CSS_SGI_MAX_CPUS_PER_CLUSTER   4
 #define CSS_SGI_MAX_PE_PER_CPU         1
 
-#define PLAT_CSS_MHU_BASE              0x45400000
+#define PLAT_CSS_MHU_BASE              UL(0x45400000)
+
+/* Base address of DMC-620 instances */
+#define SGICLARKA_DMC620_BASE0         UL(0x4e000000)
+#define SGICLARKA_DMC620_BASE1         UL(0x4e100000)
 
 #endif /* PLATFORM_DEF_H */
index fc2f766704ef3fc180414423047fc6294f541715..cf02219fb9713f0fc3f85a5bdbb09d8cd9f19e69 100644 (file)
@@ -14,7 +14,9 @@ SGI_CPU_SOURCES               :=      lib/cpus/aarch64/cortex_ares.S
 
 BL1_SOURCES            +=      ${SGI_CPU_SOURCES}
 
-BL2_SOURCES            +=      lib/utils/mem_region.c                  \
+BL2_SOURCES            +=      ${SGICLARKA_BASE}/sgiclarka_security.c  \
+                               drivers/arm/tzc/tzc_dmc620.c            \
+                               lib/utils/mem_region.c                  \
                                plat/arm/common/arm_nor_psci_mem_protect.c
 
 BL31_SOURCES           +=      ${SGI_CPU_SOURCES}                      \
diff --git a/plat/arm/board/sgiclarka/sgiclarka_security.c b/plat/arm/board/sgiclarka/sgiclarka_security.c
new file mode 100644 (file)
index 0000000..29cd754
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <debug.h>
+#include <platform_def.h>
+#include <tzc_dmc620.h>
+
+uintptr_t sgiclarka_dmc_base[] = {
+       SGICLARKA_DMC620_BASE0,
+       SGICLARKA_DMC620_BASE1
+};
+
+static const tzc_dmc620_driver_data_t sgiclarka_plat_driver_data = {
+       .dmc_base = sgiclarka_dmc_base,
+       .dmc_count = ARRAY_SIZE(sgiclarka_dmc_base)
+};
+
+static const tzc_dmc620_acc_addr_data_t sgiclarka_acc_addr_data[] = {
+       {
+               .region_base = ARM_AP_TZC_DRAM1_BASE,
+               .region_top = ARM_AP_TZC_DRAM1_BASE + ARM_TZC_DRAM1_SIZE - 1,
+               .sec_attr = TZC_DMC620_REGION_S_RDWR
+       }
+};
+
+static const tzc_dmc620_config_data_t sgiclarka_plat_config_data = {
+       .plat_drv_data = &sgiclarka_plat_driver_data,
+       .plat_acc_addr_data = sgiclarka_acc_addr_data,
+       .acc_addr_count = ARRAY_SIZE(sgiclarka_acc_addr_data)
+};
+
+/* Initialize the secure environment */
+void plat_arm_security_setup(void)
+{
+       arm_tzc_dmc620_setup(&sgiclarka_plat_config_data);
+}
index d6e5448de1542cc22c054fbd9f41ff2284ca6f4c..46fa7c4d798a015fe07f4899a3933ddb5dcdc607 100644 (file)
@@ -35,8 +35,7 @@ PLAT_BL_COMMON_SOURCES        +=      ${CSS_ENT_BASE}/sgi_plat.c      \
 
 BL1_SOURCES            +=      ${INTERCONNECT_SOURCES}
 
-BL2_SOURCES            +=      ${CSS_ENT_BASE}/sgi_security.c          \
-                               ${CSS_ENT_BASE}/sgi_image_load.c
+BL2_SOURCES            +=      ${CSS_ENT_BASE}/sgi_image_load.c
 
 BL31_SOURCES           +=      ${INTERCONNECT_SOURCES}                 \
                                ${ENT_GIC_SOURCES}                      \
diff --git a/plat/arm/css/sgi/sgi_security.c b/plat/arm/css/sgi/sgi_security.c
deleted file mode 100644 (file)
index 23e1a64..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arm_config.h>
-#include <plat_arm.h>
-
-/*
- * We assume that all security programming is done by the primary core.
- */
-void plat_arm_security_setup(void)
-{
-}