clk: qcom: Add MSM8916 iommu clocks

Add support for the msm8916 TCU (Translation Control Unit) clocks that
are needed for IOMMU.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
index 83871b663e2199ca421da25a25faa6ffd1a579f3..ad9316751eb27ca3f1d08c618e72517481939897 100644 (file)
--- a/drivers/clk/qcom/gcc-msm8916.c
+++ b/drivers/clk/qcom/gcc-msm8916.c
@@ -2347,6 +2347,51 @@ static struct clk_branch gcc_sdcc2_apps_clk = {
        },
 };
 
+static struct clk_rcg2 bimc_ddr_clk_src = {
+       .cmd_rcgr = 0x32004,
+       .hid_width = 5,
+       .parent_map = gcc_xo_gpll0_bimc_map,
+       .clkr.hw.init = &(struct clk_init_data){
+               .name = "bimc_ddr_clk_src",
+               .parent_names = gcc_xo_gpll0_bimc,
+               .num_parents = 3,
+               .ops = &clk_rcg2_ops,
+               .flags = CLK_GET_RATE_NOCACHE,
+       },
+};
+
+static struct clk_branch gcc_apss_tcu_clk = {
+       .halt_reg = 0x12018,
+       .clkr = {
+               .enable_reg = 0x4500c,
+               .enable_mask = BIT(1),
+               .hw.init = &(struct clk_init_data){
+                       .name = "gcc_apss_tcu_clk",
+                       .parent_names = (const char *[]){
+                               "bimc_ddr_clk_src",
+                       },
+                       .num_parents = 1,
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
+static struct clk_branch gcc_gfx_tcu_clk = {
+       .halt_reg = 0x12020,
+       .clkr = {
+               .enable_reg = 0x4500c,
+               .enable_mask = BIT(2),
+               .hw.init = &(struct clk_init_data){
+                       .name = "gcc_gfx_tcu_clk",
+                       .parent_names = (const char *[]){
+                               "bimc_ddr_clk_src",
+                       },
+                       .num_parents = 1,
+                       .ops = &clk_branch2_ops,
+               },
+       },
+};
+
 static struct clk_branch gcc_gtcu_ahb_clk = {
        .halt_reg = 0x12044,
        .clkr = {
@@ -2730,6 +2775,9 @@ static struct clk_regmap *gcc_msm8916_clocks[] = {
        [GCC_VENUS0_AHB_CLK] = &gcc_venus0_ahb_clk.clkr,
        [GCC_VENUS0_AXI_CLK] = &gcc_venus0_axi_clk.clkr,
        [GCC_VENUS0_VCODEC0_CLK] = &gcc_venus0_vcodec0_clk.clkr,
+       [BIMC_DDR_CLK_SRC] = &bimc_ddr_clk_src.clkr,
+       [GCC_APSS_TCU_CLK] = &gcc_apss_tcu_clk.clkr,
+       [GCC_GFX_TCU_CLK] = &gcc_gfx_tcu_clk.clkr,
 };
 
 static struct gdsc *gcc_msm8916_gdscs[] = {

diff --git a/include/dt-bindings/clock/qcom,gcc-msm8916.h b/include/dt-bindings/clock/qcom,gcc-msm8916.h
index 11566c5673569cf7bd77ab200357317f71182a13..9169ae656c77daec6164da6fec4ec593db94f267 100644 (file)
--- a/include/dt-bindings/clock/qcom,gcc-msm8916.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8916.h
@@ -152,6 +152,9 @@
 #define GCC_VENUS0_AHB_CLK                     135
 #define GCC_VENUS0_AXI_CLK                     136
 #define GCC_VENUS0_VCODEC0_CLK                 137
+#define BIMC_DDR_CLK_SRC                       138
+#define GCC_APSS_TCU_CLK                       139
+#define GCC_GFX_TCU_CLK                                140
 
 /* Indexes for GDSCs */
 #define BIMC_GDSC                              0