Make BL31's ns_entry_info a single-cpu area

ns_entry_info used to be a per-cpu array.  This is a waste of space
because it is only accessed by the primary CPU on the cold boot path.
This patch reduces ns_entry_info to a single-cpu area.

Change-Id: I647c70c4e76069560f1aaad37a1d5910f56fba4c

diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index 2a4c979d927c7f0271a4ef071ea8f4d5e005b00e..79faf6375cecd8d6d8a34aa98aa5eba8a9a64fe3 100644 (file)
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -120,7 +120,6 @@ bl31_entrypoint:; .type bl31_entrypoint, %function
         */
        mov     x0, x20
        mov     x1, x21
-       mov     x2, x19
        bl      bl31_early_platform_setup
        bl      bl31_plat_arch_setup
 

diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index e20bb7b79c6fa2cd6e4b5ea31c6d8dcba0d41c4d..d60f2524e4a16ba501564719a497e904074fc0d2 100644 (file)
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -67,7 +67,7 @@ void bl31_main(void)
        /* Clean caches before re-entering normal world */
        dcsw_op_all(DCCSW);
 
-       image_info = bl31_get_next_image_info(mpidr);
+       image_info = bl31_get_next_image_info();
        bl31_arch_next_el_setup();
        change_el(image_info);
 

diff --git a/include/bl31.h b/include/bl31.h
index acb1229285beb623a5396e7c45adeee97b8afd12..5320e5821c74fabaf8407ff19c85b442ef0c6760 100644 (file)
--- a/include/bl31.h
+++ b/include/bl31.h
@@ -43,7 +43,7 @@ extern unsigned long bl31_entrypoint;
  ******************************************************************************/
 extern void bl31_platform_setup(void);
 extern meminfo *bl31_plat_sec_mem_layout(void);
-extern el_change_info* bl31_get_next_image_info(unsigned long);
+extern el_change_info* bl31_get_next_image_info(void);
 extern void gic_cpuif_deactivate(unsigned int);
 extern void gic_cpuif_setup(unsigned int);
 extern void gic_pcpu_distif_setup(unsigned int);

diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c
index 221b85ac73223af0d3e2590ff5d73db844ec54a4..6c59e846e1938c535a05319dcded9aeca2d66bd8 100644 (file)
--- a/plat/fvp/bl31_plat_setup.c
+++ b/plat/fvp/bl31_plat_setup.c
@@ -70,13 +70,11 @@ extern unsigned long __COHERENT_RAM_END__;
 #define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
 
 /*******************************************************************************
- * This data structures holds information copied by BL31 from BL2 to pass
- * control to the non-trusted software images. A per-cpu entry was created to
- * use the same structure in the warm boot path but that's not the case right
- * now. Persisting with this approach for the time being. TODO: Can this be
- * moved out of device memory.
+ * This data structure holds information copied by BL31 from BL2 to pass
+ * control to the normal world software images.
+ * TODO: Can this be moved out of device memory.
  ******************************************************************************/
-el_change_info ns_entry_info[PLATFORM_CORE_COUNT]
+static el_change_info ns_entry_info
 __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
                section("tzfw_coherent_mem")));
 
@@ -96,9 +94,9 @@ meminfo *bl31_plat_sec_mem_layout(void)
  * always run in the non-secure state. In the final architecture there
  * will be a series of images. This function will need enhancement then
  ******************************************************************************/
-el_change_info *bl31_get_next_image_info(unsigned long mpidr)
+el_change_info *bl31_get_next_image_info(void)
 {
-       return &ns_entry_info[platform_get_core_pos(mpidr)];
+       return &ns_entry_info;
 }
 
 /*******************************************************************************
@@ -108,11 +106,9 @@ el_change_info *bl31_get_next_image_info(unsigned long mpidr)
  * layout can be used while creating page tables.
  ******************************************************************************/
 void bl31_early_platform_setup(meminfo *mem_layout,
-                              void *data,
-                              unsigned long mpidr)
+                              void *data)
 {
        el_change_info *image_info = (el_change_info *) data;
-       unsigned int lin_index = platform_get_core_pos(mpidr);
 
        /* Setup the BL31 memory layout */
        bl31_tzram_layout.total_base = mem_layout->total_base;
@@ -122,12 +118,12 @@ void bl31_early_platform_setup(meminfo *mem_layout,
        bl31_tzram_layout.attr = mem_layout->attr;
        bl31_tzram_layout.next = 0;
 
-       /* Save information about jumping into the NS world */
-       ns_entry_info[lin_index].entrypoint = image_info->entrypoint;
-       ns_entry_info[lin_index].spsr = image_info->spsr;
-       ns_entry_info[lin_index].args = image_info->args;
-       ns_entry_info[lin_index].security_state = image_info->security_state;
-       ns_entry_info[lin_index].next = image_info->next;
+       /* Save information about jumping into the normal world */
+       ns_entry_info.entrypoint = image_info->entrypoint;
+       ns_entry_info.spsr = image_info->spsr;
+       ns_entry_info.args = image_info->args;
+       ns_entry_info.security_state = image_info->security_state;
+       ns_entry_info.next = image_info->next;
 
        /* Initialize the platform config for future decision making */
        platform_config_setup();