#define EFUSE_BASE 0x140
#define EFUSE_SIZE 0xC0
-uint64_t gxbb_efuse_read(void *dst, uint32_t offset, uint32_t size)
+uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size)
{
if ((uint64_t)(offset + size) > (uint64_t)EFUSE_SIZE)
return 0;
return scpi_efuse_read(dst, offset + EFUSE_BASE, size);
}
-uint64_t gxbb_efuse_user_max(void)
+uint64_t aml_efuse_user_max(void)
{
return EFUSE_SIZE;
}
case GXBB_SM_EFUSE_READ:
{
void *dst = (void *)GXBB_SHARE_MEM_OUTPUT_BASE;
- uint64_t ret = gxbb_efuse_read(dst, (uint32_t)x1, x2);
+ uint64_t ret = aml_efuse_read(dst, (uint32_t)x1, x2);
SMC_RET1(handle, ret);
}
case GXBB_SM_EFUSE_USER_MAX:
- SMC_RET1(handle, gxbb_efuse_user_max());
+ SMC_RET1(handle, aml_efuse_user_max());
case GXBB_SM_JTAG_ON:
scpi_jtag_set_state(GXBB_JTAG_STATE_ON, x1);
/* Peripherals */
void gxbb_thermal_unknown(void);
-uint64_t gxbb_efuse_read(void *dst, uint32_t offset, uint32_t size);
-uint64_t gxbb_efuse_user_max(void);
+uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size);
+uint64_t aml_efuse_user_max(void);
#endif /* GXBB_PRIVATE_H */