regulator: qcom_spmi: Update mvs1/mvs2 switches on pm8941

The mvs1 and mvs2 switches are actually called 5vs1 and 5vs2 on
some datasheets. Let's rename them to match the datasheets and
also match the RPM based regulator driver which calls these by
their 5vs names (see qcom_smd-regulator.c). There aren't any
users of these regulators so far, so there aren't any concerns of
DT ABI breakage here. While we're here making updates to the
switches, also mandate usage of the OCP irq for these switches
too.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: e92a4047419c ("regulator: Add QCOM SPMI regulator driver")
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
index 3e827bb9a56d2222dc4f983b76bc06d9ac69e4d5..0fa3b0fac129838e44fb02ffd5074c0b523c3a35 100644 (file)
--- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
@@ -115,7 +115,7 @@ pm8916:
 pm8941:
        s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,
        l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3,
-       mvs1, mvs2
+       5vs1, 5vs2
 
 pm8994:
        s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5,

diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c
index fe09407b150b6ad78289e920674a8fa73e3af95d..43f8f20b82e9c72fc3e1b7a6ee51afe8240e52bb 100644 (file)
--- a/drivers/regulator/qcom_spmi-regulator.c
+++ b/drivers/regulator/qcom_spmi-regulator.c
@@ -1524,8 +1524,8 @@ static const struct spmi_regulator_data pm8941_regulators[] = {
        { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
        { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
        { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
-       { "mvs1", 0x8300, "vin_5vs", },
-       { "mvs2", 0x8400, "vin_5vs", },
+       { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
+       { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
        { }
 };