The counter 'A' clock polarity field in the 'CRA' register is only 1 bit
wide, but the `S626_CRAMSK_CLKPOL_A` macro shows it as 2 bits wide,
which would overlap with the counter 'A' interrupt source field. This
is harmless as the macro isn't actually used yet, but correct it anyway
as I want to use it!
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
#define S626_CRAMSK_LOADSRC_A (3 << S626_CRABIT_LOADSRC_A)
#define S626_CRAMSK_CLKMULT_A (3 << S626_CRABIT_CLKMULT_A)
#define S626_CRAMSK_INTSRC_A (3 << S626_CRABIT_INTSRC_A)
-#define S626_CRAMSK_CLKPOL_A (3 << S626_CRABIT_CLKPOL_A)
+#define S626_CRAMSK_CLKPOL_A (1 << S626_CRABIT_CLKPOL_A)
#define S626_CRAMSK_INDXSRC_A (3 << S626_CRABIT_INDXSRC_A)
#define S626_CRAMSK_CNTSRC_A (3 << S626_CRABIT_CNTSRC_A)