Move the ethernet phy definition from the eap2x5-1port include to the
device-specific DTS files. This is to prepare for new devices that have
a different ethernet phy, at another MDIO address.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
};
};
+ð0 {
+ phy-handle = <&phy4>;
+ phy-mode = "sgmii";
+};
+
+&mdio0 {
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pcie {
wifi@0,0 {
compatible = "qcom,ath10k";
};
};
+ð0 {
+ phy-handle = <&phy4>;
+ phy-mode = "sgmii";
+};
+
+&mdio0 {
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pcie {
wifi@0,0 {
compatible = "qcom,ath10k";
};
};
+ð0 {
+ phy-handle = <&phy4>;
+ phy-mode = "sgmii";
+};
+
+&mdio0 {
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pcie {
wifi@0,0 {
compatible = "qcom,ath10k";
};
};
+ð0 {
+ phy-handle = <&phy4>;
+ phy-mode = "sgmii";
+};
+
+&mdio0 {
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pcie {
wifi@0,0 {
compatible = "qcom,ath10k";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
-
- phy4: ethernet-phy@4 {
- reg = <4>;
- reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
- };
};
ð0 {
status = "okay";
- phy-handle = <&phy4>;
- phy-mode = "sgmii";
pll-data = <0x03000000 0x00000101 0x00001313>;
nvmem-cells = <&macaddr_info_8>;