drm/fsl-dcu: avoid disabling pixel clock twice on suspend
authorStefan Agner <stefan@agner.ch>
Thu, 9 Nov 2017 14:39:56 +0000 (15:39 +0100)
committerStefan Agner <stefan@agner.ch>
Tue, 14 Nov 2017 16:19:23 +0000 (17:19 +0100)
With commit 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when
enabling CRTC") the pixel clock is controlled by the CRTC code.
Disabling the pixel clock in suspend leads to a warning due to
the second clk_disable_unprepare call:
  WARNING: CPU: 0 PID: 359 at drivers/clk/clk.c:594 clk_core_disable+0x8c/0x90

Remove clk_disable_unprepare call for pixel clock to avoid
unbalanced clock disable on suspend.

Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC")
Signed-off-by: Stefan Agner <stefan@agner.ch>
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

index 58e9e0601a616b86bc910dc606ea7229c79fa52b..90ad509c7c453ccdb4783d234acd3e9e094d302b 100644 (file)
@@ -210,7 +210,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev)
                return PTR_ERR(fsl_dev->state);
        }
 
-       clk_disable_unprepare(fsl_dev->pix_clk);
        clk_disable_unprepare(fsl_dev->clk);
 
        return 0;