realtek: Add and enable watchdog node
authorSander Vanheule <sander@svanheule.net>
Sun, 14 Nov 2021 18:45:33 +0000 (19:45 +0100)
committerStijn Tintel <stijn@linux-ipv6.be>
Wed, 24 Nov 2021 19:43:42 +0000 (21:43 +0200)
Add and enable the Realtek Otto WDT peripheral found on these SoCs.

Default all devices to use standard (cold) reboot and "soc" resets.

Devices that require the PLL value fixup before restarting, should pick
the "cpu" or "software" reset mode. These devices also need to provide a
custom reboot mode, by adding the reboot argument to the kernel command
line:

    WDT reset mode  | kernel reboot mode
    ----------------+---------------------------------------
    soc             | reboot=cold (default if not specified)
    cpu             | reboot=warm
    software        | reboot=software

Preferrably, these devices should use an alternative restart method like
gpio-restart to provide reliable restarts.

Note that watchdog restarts are not yet exposed, since the
_machine_restart override is still present.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
target/linux/realtek/config-5.10
target/linux/realtek/dts-5.10/rtl838x.dtsi
target/linux/realtek/dts-5.10/rtl930x.dtsi

index 2c5ab1706a2cd0b883b41d70559228885f19ff52..00f2a6af13ba93f9f804c8551bcc8c4325a979c9 100644 (file)
@@ -160,6 +160,7 @@ CONFIG_PINCTRL=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_RATIONAL=y
+CONFIG_REALTEK_OTTO_WDT=y
 CONFIG_REALTEK_PHY=y
 CONFIG_REALTEK_SOC_PHY=y
 CONFIG_REGMAP=y
@@ -190,5 +191,6 @@ CONFIG_TIMER_PROBE=y
 CONFIG_TINY_SRCU=y
 CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
 CONFIG_USE_OF=y
+CONFIG_WATCHDOG_CORE=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_ZLIB_INFLATE=y
index dc60e12bad0be9f407f41e9ba2324372bece69d2..f356f8fcde090e9428f4ba6d00589f0d0b9a14ba 100644 (file)
                        status = "disabled";
                };
 
+               watchdog0: watchdog@3150 {
+                       compatible = "realtek,rtl8380-wdt";
+                       reg = <0x3150 0xc>;
+
+                       realtek,reset-mode = "soc";
+
+                       clocks = <&lx_clk>;
+                       timeout-sec = <30>;
+
+                       interrupt-parent = <&intc>;
+                       interrupt-names = "phase1", "phase2";
+                       interrupts = <19>, <18>;
+               };
+
                gpio0: gpio-controller@3500 {
                        compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
                        reg = <0x3500 0x20>;
index 9e9501d51ad5759c582962abd0a2ee6bf538d095..a4c9757505f52a4ae0781fbfda3cddf0f493efb8 100644 (file)
                                <10 &cpuintc 1>, /* TC3 */
                                <9 &cpuintc 1>,  /* TC2 */
                                <8 &cpuintc 1>,  /* TC1 */
-                               <7 &cpuintc 5>;  /* TC0 */
+                               <7 &cpuintc 5>,  /* TC0 */
+                               <6 &cpuintc 5>,  /* WDT_IP2 */
+                               <5 &cpuintc 4>;  /* WDT_IP1 */
                };
 
                timer: timer@3200 {
                        status = "disabled";
                };
 
+               watchdog0: watchdog@3260 {
+                       compatible = "realtek,rtl9300-wdt";
+                       reg = <0x3260 0xc>;
+
+                       realtek,reset-mode = "soc";
+
+                       clocks = <&lx_clk>;
+                       timeout-sec = <30>;
+
+                       interrupt-parent = <&intc>;
+                       interrupt-names = "phase1", "phase2";
+                       interrupts = <5>, <6>;
+               };
+
                gpio0: gpio-controller@3500 {
                        compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
                        reg = <0x3500 0x20>;