--- /dev/null
+From a07e31adf2753cad2fd9790db5bfc047c81e8152 Mon Sep 17 00:00:00 2001
+From: Felix Matouschek <felix@matouschek.org>
+Date: Fri, 2 Jul 2021 20:31:23 +0200
+Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
+
+Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
+XTX26G04AXXXXX SPI NAND.
+
+These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
+(8bit strength per 512bytes).
+
+Tested on Teltonika RUTX10 flashed with OpenWrt.
+
+Datasheets available at
+http://www.xtxtech.com/download/?AId=225
+https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
+
+Signed-off-by: Felix Matouschek <felix@matouschek.org>
+---
+ drivers/mtd/nand/spi/Makefile | 2 +-
+ drivers/mtd/nand/spi/core.c | 1 +
+ drivers/mtd/nand/spi/xtx.c | 122 ++++++++++++++++++++++++++++++++++
+ include/linux/mtd/spinand.h | 1 +
+ 4 files changed, 125 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/spi/xtx.c
+
+--- a/drivers/mtd/nand/spi/Makefile
++++ b/drivers/mtd/nand/spi/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -760,6 +760,7 @@ static const struct spinand_manufacturer
+ ¶gon_spinand_manufacturer,
+ &toshiba_spinand_manufacturer,
+ &winbond_spinand_manufacturer,
++ &xtx_spinand_manufacturer,
+ };
+
+ static int spinand_manufacturer_match(struct spinand_device *spinand,
+--- /dev/null
++++ b/drivers/mtd/nand/spi/xtx.c
+@@ -0,0 +1,122 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Author:
++ * Felix Matouschek <felix@matouschek.org>
++ */
++
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/mtd/spinand.h>
++
++#define SPINAND_MFR_XTX 0x0B
++
++#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
++#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
++#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
++#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
++
++static SPINAND_OP_VARIANTS(read_cache_variants,
++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
++
++static SPINAND_OP_VARIANTS(write_cache_variants,
++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
++ SPINAND_PROG_LOAD(true, 0, NULL, 0));
++
++static SPINAND_OP_VARIANTS(update_cache_variants,
++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
++ SPINAND_PROG_LOAD(false, 0, NULL, 0));
++
++static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
++ struct mtd_oob_region *region)
++{
++ if (section)
++ return -ERANGE;
++
++ region->offset = 8;
++ region->length = 40;
++
++ return 0;
++}
++
++static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
++ struct mtd_oob_region *region)
++{
++ if (section)
++ return -ERANGE;
++
++ region->offset = 1;
++ region->length = 7;
++
++ return 0;
++}
++
++static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
++ .ecc = xt26g0xa_ooblayout_ecc,
++ .free = xt26g0xa_ooblayout_free,
++};
++
++static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
++ u8 status)
++{
++ switch (status & XT26G0XA_STATUS_ECC_MASK) {
++ case XT26G0XA_STATUS_ECC_NO_DETECTED:
++ return 0;
++ case XT26G0XA_STATUS_ECC_8_CORRECTED:
++ return 8;
++ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
++ return -EBADMSG;
++ default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
++ return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
++ }
++
++ return -EINVAL;
++}
++
++static const struct spinand_info xtx_spinand_table[] = {
++ SPINAND_INFO("XT26G01A",
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE1),
++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++ SPINAND_INFO("XT26G02A",
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++ SPINAND_INFO("XT26G04A",
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE3),
++ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++};
++
++static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
++};
++
++const struct spinand_manufacturer xtx_spinand_manufacturer = {
++ .id = SPINAND_MFR_XTX,
++ .name = "XTX",
++ .chips = xtx_spinand_table,
++ .nchips = ARRAY_SIZE(xtx_spinand_table),
++ .ops = &xtx_spinand_manuf_ops,
++};
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -244,6 +244,7 @@ extern const struct spinand_manufacturer
+ extern const struct spinand_manufacturer paragon_spinand_manufacturer;
+ extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
+ extern const struct spinand_manufacturer winbond_spinand_manufacturer;
++extern const struct spinand_manufacturer xtx_spinand_manufacturer;
+
+ /**
+ * struct spinand_op_variants - SPI NAND operation variants
--- /dev/null
+From 8ffe91b6b429277bd7bd79267ba836edf951dce2 Mon Sep 17 00:00:00 2001
+From: Felix Matouschek <felix@matouschek.org>
+Date: Fri, 2 Jul 2021 20:31:23 +0200
+Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
+
+Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
+XTX26G04AXXXXX SPI NAND.
+
+These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
+(8bit strength per 512bytes).
+
+Tested on Teltonika RUTX10 flashed with OpenWrt.
+
+Datasheets available at
+http://www.xtxtech.com/download/?AId=225
+https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
+
+Signed-off-by: Felix Matouschek <felix@matouschek.org>
+---
+ drivers/mtd/nand/spi/Makefile | 2 +-
+ drivers/mtd/nand/spi/core.c | 1 +
+ drivers/mtd/nand/spi/xtx.c | 139 ++++++++++++++++++++++++++++++++++
+ include/linux/mtd/spinand.h | 1 +
+ 4 files changed, 142 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/spi/xtx.c
+
+--- a/drivers/mtd/nand/spi/Makefile
++++ b/drivers/mtd/nand/spi/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -758,6 +758,7 @@ static const struct spinand_manufacturer
+ ¶gon_spinand_manufacturer,
+ &toshiba_spinand_manufacturer,
+ &winbond_spinand_manufacturer,
++ &xtx_spinand_manufacturer,
+ };
+
+ static int spinand_manufacturer_detect(struct spinand_device *spinand)
+--- /dev/null
++++ b/drivers/mtd/nand/spi/xtx.c
+@@ -0,0 +1,139 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Author:
++ * Felix Matouschek <felix@matouschek.org>
++ */
++
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/mtd/spinand.h>
++
++#define SPINAND_MFR_XTX 0x0B
++
++#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
++#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
++#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
++#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
++
++static SPINAND_OP_VARIANTS(read_cache_variants,
++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
++
++static SPINAND_OP_VARIANTS(write_cache_variants,
++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
++ SPINAND_PROG_LOAD(true, 0, NULL, 0));
++
++static SPINAND_OP_VARIANTS(update_cache_variants,
++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
++ SPINAND_PROG_LOAD(false, 0, NULL, 0));
++
++static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
++ struct mtd_oob_region *region)
++{
++ if (section)
++ return -ERANGE;
++
++ region->offset = 8;
++ region->length = 40;
++
++ return 0;
++}
++
++static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
++ struct mtd_oob_region *region)
++{
++ if (section)
++ return -ERANGE;
++
++ region->offset = 1;
++ region->length = 7;
++
++ return 0;
++}
++
++static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
++ .ecc = xt26g0xa_ooblayout_ecc,
++ .free = xt26g0xa_ooblayout_free,
++};
++
++static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
++ u8 status)
++{
++ switch (status & XT26G0XA_STATUS_ECC_MASK) {
++ case XT26G0XA_STATUS_ECC_NO_DETECTED:
++ return 0;
++ case XT26G0XA_STATUS_ECC_8_CORRECTED:
++ return 8;
++ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
++ return -EBADMSG;
++ default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
++ return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
++ }
++
++ return -EINVAL;
++}
++
++static const struct spinand_info xtx_spinand_table[] = {
++ SPINAND_INFO("XT26G01A", 0xE1,
++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++ SPINAND_INFO("XT26G02A", 0xE2,
++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++ SPINAND_INFO("XT26G04A", 0xE3,
++ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ SPINAND_HAS_QE_BIT,
++ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
++ xt26g0xa_ecc_get_status)),
++};
++
++static int xtx_spinand_detect(struct spinand_device *spinand)
++{
++ u8 *id = spinand->id.data;
++ int ret;
++
++ /*
++ * XTX SPI NAND read ID needs a dummy byte, so the first byte in
++ * raw_id is garbage.
++ */
++ if (id[1] != SPINAND_MFR_XTX)
++ return 0;
++
++ ret = spinand_match_and_init(spinand, xtx_spinand_table,
++ ARRAY_SIZE(xtx_spinand_table),
++ id[2]);
++ if (ret)
++ return ret;
++
++ return 1;
++}
++
++static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
++ .detect = xtx_spinand_detect,
++};
++
++const struct spinand_manufacturer xtx_spinand_manufacturer = {
++ .id = SPINAND_MFR_XTX,
++ .name = "XTX",
++ .ops = &xtx_spinand_manuf_ops,
++};
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -230,6 +230,7 @@ extern const struct spinand_manufacturer
+ extern const struct spinand_manufacturer paragon_spinand_manufacturer;
+ extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
+ extern const struct spinand_manufacturer winbond_spinand_manufacturer;
++extern const struct spinand_manufacturer xtx_spinand_manufacturer;
+
+ /**
+ * struct spinand_op_variants - SPI NAND operation variants