drm/amdgpu: Add gfx_off support in smu through pp_set_powergating_by_smu
authorRex Zhu <Rex.Zhu@amd.com>
Tue, 5 Jun 2018 03:46:35 +0000 (11:46 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Jul 2018 21:38:49 +0000 (16:38 -0500)
we can take gfx off feature as gfx power gate. gfx off feature is also
controled by smu. so add gfx_off support in pp_set_powergating_by_smu.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/powerplay/amd_powerplay.c

index d82d0d31428533483158dfd1809a5fd1409e6744..c33a41ace02821a4f49aae06318cd1392c2d5b79 100644 (file)
@@ -1730,16 +1730,11 @@ static int amdgpu_device_ip_late_set_cg_state(struct amdgpu_device *adev)
                }
        }
 
-       if (adev->powerplay.pp_feature & PP_GFXOFF_MASK) {
+       if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
                /* enable gfx powergating */
                amdgpu_device_ip_set_powergating_state(adev,
                                                       AMD_IP_BLOCK_TYPE_GFX,
                                                       AMD_PG_STATE_GATE);
-               /* enable gfxoff */
-               amdgpu_device_ip_set_powergating_state(adev,
-                                                      AMD_IP_BLOCK_TYPE_SMC,
-                                                      AMD_PG_STATE_GATE);
-       }
 
        return 0;
 }
@@ -1812,6 +1807,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
                                          adev->ip_blocks[i].version->funcs->name, r);
                                return r;
                        }
+                       if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+                               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
                        r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);
                        /* XXX handle errors */
                        if (r) {
@@ -1921,12 +1918,6 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
        if (amdgpu_sriov_vf(adev))
                amdgpu_virt_request_full_gpu(adev, false);
 
-       /* ungate SMC block powergating */
-       if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)
-               amdgpu_device_ip_set_powergating_state(adev,
-                                                      AMD_IP_BLOCK_TYPE_SMC,
-                                                      AMD_PG_STATE_UNGATE);
-
        /* ungate SMC block first */
        r = amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_SMC,
                                                   AMD_CG_STATE_UNGATE);
@@ -1934,6 +1925,10 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)
                DRM_ERROR("set_clockgating_state(ungate) SMC failed %d\n", r);
        }
 
+       /* call smu to disable gfx off feature first when suspend */
+       if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+               amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);
+
        for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
                if (!adev->ip_blocks[i].status.valid)
                        continue;
index a69153435ea7ec9ccf4180b70ead070734549688..ac46eabe3bcde1e4622ed110dc8bb8d0e8d1e9b9 100644 (file)
@@ -3714,6 +3714,10 @@ static int gfx_v9_0_set_powergating_state(void *handle,
 
                /* update mgcg state */
                gfx_v9_0_update_gfx_mg_power_gating(adev, enable);
+
+               /* set gfx off through smu */
+               if (enable && adev->powerplay.pp_funcs->set_powergating_by_smu)
+                       amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true);
                break;
        default:
                break;
index ef4884b0ddff9e677378123528266fe8c57dd65f..387a1eb6678dc2aaf5696daa30f09e34dff9c5c5 100644 (file)
@@ -221,23 +221,7 @@ static int pp_sw_reset(void *handle)
 static int pp_set_powergating_state(void *handle,
                                    enum amd_powergating_state state)
 {
-       struct amdgpu_device *adev = handle;
-       struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
-       int ret;
-
-       if (!hwmgr || !hwmgr->pm_en)
-               return 0;
-
-       if (hwmgr->hwmgr_func->gfx_off_control) {
-               /* Enable/disable GFX off through SMU */
-               ret = hwmgr->hwmgr_func->gfx_off_control(hwmgr,
-                                                        state == AMD_PG_STATE_GATE);
-               if (ret)
-                       pr_err("gfx off control failed!\n");
-       }
-
        return 0;
-
 }
 
 static int pp_suspend(void *handle)