KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
-LINUX_VERSION-5.4 = .77
+LINUX_VERSION-5.4 = .79
-LINUX_KERNEL_HASH-5.4.77 = a3e03e6970240dddc8174bf9f49b56d774c40125eabe1582d2ebe85b01addbf7
+LINUX_KERNEL_HASH-5.4.79 = a59091fb08ff66a344a7842b7c891f36cef609eed1d2944edf475cca8d91ce25
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
ipv6_hdr(skb)->hop_limit != hop_limit ||
- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) {
+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) {
- err = ip6_route_me_harder(state->net, skb);
+ err = ip6_route_me_harder(state->net, state->sk, skb);
if (err < 0)
ret = NF_DROP_ERR(err);
}
static int bcm2835_spi_setup(struct spi_device *spi)
-@@ -1277,6 +1325,7 @@ static int bcm2835_spi_probe(struct plat
+@@ -1276,6 +1324,7 @@ static int bcm2835_spi_probe(struct plat
ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
ctlr->num_chipselect = BCM2835_SPI_NUM_CS;
ctlr->setup = bcm2835_spi_setup;
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
-@@ -1279,31 +1279,6 @@ static int bcm2835_spi_setup(struct spi_
+@@ -1278,31 +1278,6 @@ static int bcm2835_spi_setup(struct spi_
return -EINVAL;
}
-
- spi->cs_gpiod = gpiochip_request_own_desc(chip, 8 - spi->chip_select,
- DRV_NAME,
-- lflags,
+- GPIO_LOOKUP_FLAGS_DEFAULT,
- GPIOD_OUT_LOW);
- if (IS_ERR(spi->cs_gpiod))
- return PTR_ERR(spi->cs_gpiod);
/* Read as many bytes as possible from FIFO */
bcm2835_rd_fifo(bs);
/* Write as many bytes as possible to FIFO */
-@@ -1335,7 +1339,8 @@ static int bcm2835_spi_probe(struct plat
+@@ -1334,7 +1338,8 @@ static int bcm2835_spi_probe(struct plat
bcm2835_wr(bs, BCM2835_SPI_CS,
BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
-@@ -1230,8 +1230,6 @@ static int bcm2835_spi_setup(struct spi_
+@@ -1230,7 +1230,6 @@ static int bcm2835_spi_setup(struct spi_
{
struct spi_controller *ctlr = spi->controller;
struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
- struct gpio_chip *chip;
-- enum gpio_lookup_flags lflags;
u32 cs;
/*
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
-@@ -1023,7 +1023,7 @@ bool of_dma_is_coherent(struct device_no
+@@ -1025,7 +1025,7 @@ bool of_dma_is_coherent(struct device_no
of_node_put(node);
return true;
}
}
--- a/kernel/dma/swiotlb.c
+++ b/kernel/dma/swiotlb.c
-@@ -678,7 +678,7 @@ bool swiotlb_map(struct device *dev, phy
+@@ -682,7 +682,7 @@ bool swiotlb_map(struct device *dev, phy
/* Ensure that the address returned is DMA'ble */
*dma_addr = __phys_to_dma(dev, *phys);
drivers/net/usb/qmi_wwan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
-index 581ed51abb532..fc378ff56775b 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
-@@ -1070,7 +1070,7 @@ static const struct usb_device_id products[] = {
+@@ -1092,7 +1092,7 @@ static const struct usb_device_id produc
{QMI_FIXED_INTF(0x05c6, 0x9011, 4)},
{QMI_FIXED_INTF(0x05c6, 0x9021, 1)},
{QMI_FIXED_INTF(0x05c6, 0x9022, 2)},
{QMI_FIXED_INTF(0x05c6, 0x9026, 3)},
{QMI_FIXED_INTF(0x05c6, 0x902e, 5)},
{QMI_FIXED_INTF(0x05c6, 0x9031, 5)},
---
-cgit 1.2.3-1.el7
-
Fixes: eb13fa022741 ("mtd: parser: cmdline: Support MTD names containing one or more colons")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
-diff --git a/drivers/mtd/parsers/cmdlinepart.c b/drivers/mtd/parsers/cmdlinepart.c
-index 0625b25620ca766318ea4646a6e3761ff4d3a4cc..22881ea4c132ea5a5ba7aebd025d91bf1cd023af 100644
--- a/drivers/mtd/parsers/cmdlinepart.c
+++ b/drivers/mtd/parsers/cmdlinepart.c
@@ -218,7 +218,7 @@ static int mtdpart_setup_real(char *s)
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
-@@ -2101,6 +2101,75 @@ put_table:
+@@ -2102,6 +2102,75 @@ put_table:
}
/**
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
-@@ -2141,6 +2141,7 @@ int dev_pm_opp_adjust_voltage(struct dev
+@@ -2142,6 +2142,7 @@ int dev_pm_opp_adjust_voltage(struct dev
struct opp_table *opp_table;
struct dev_pm_opp *tmp_opp, *opp = ERR_PTR(-ENODEV);
int r = 0;
/* Find the opp_table */
opp_table = _find_opp_table(dev);
-@@ -2170,8 +2171,17 @@ int dev_pm_opp_adjust_voltage(struct dev
+@@ -2171,8 +2172,17 @@ int dev_pm_opp_adjust_voltage(struct dev
goto adjust_unlock;
opp->supplies->u_volt = u_volt;
- clk_disable_unprepare(res->core_clk);
- clk_disable_unprepare(res->aux_clk);
- clk_disable_unprepare(res->ref_clk);
- regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
- }
-@@ -321,47 +310,45 @@ static int qcom_pcie_init_2_1_0(struct q
+ writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
+
+@@ -334,47 +323,45 @@ static int qcom_pcie_init_2_1_0(struct q
return ret;
}
/* enable PCIe clocks and resets */
val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
-@@ -393,36 +380,6 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -406,36 +393,6 @@ static int qcom_pcie_init_2_1_0(struct q
val |= PHY_REFCLK_SSP_EN;
writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
/* wait for clock acquisition */
usleep_range(1000, 1500);
-@@ -435,15 +392,19 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -448,15 +405,19 @@ static int qcom_pcie_init_2_1_0(struct q
return 0;
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -355,7 +355,8 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -368,7 +368,8 @@ static int qcom_pcie_init_2_1_0(struct q
val &= ~BIT(0);
writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) |
PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34),
-@@ -1315,6 +1316,7 @@ err_pm_runtime_put:
+@@ -1328,6 +1329,7 @@ err_pm_runtime_put:
static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
};
#define to_qcom_pcie(x) dev_get_drvdata((x)->dev)
-@@ -384,6 +388,11 @@ static int qcom_pcie_init_2_1_0(struct q
+@@ -397,6 +401,11 @@ static int qcom_pcie_init_2_1_0(struct q
/* wait for clock acquisition */
usleep_range(1000, 1500);
/* Set the Max TLP size to 2K, instead of using default of 4K */
writel(CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K,
-@@ -1248,6 +1257,10 @@ static int qcom_pcie_probe(struct platfo
+@@ -1261,6 +1270,10 @@ static int qcom_pcie_probe(struct platfo
goto err_pm_runtime_put;
}
depends on ARCH_MOXART || COMPILE_TEST
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
-@@ -51,6 +51,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium
+@@ -50,6 +50,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium
obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
+++ /dev/null
-From 1960d75e3251659be8276529e4d01cf6993d9f4a Mon Sep 17 00:00:00 2001
-From: Ansuel Smith <ansuelsmth@gmail.com>
-Date: Tue, 1 Sep 2020 14:21:44 +0200
-Subject: [PATCH] PCI: qcom: Make sure PCIe is reset before init for rev 2.1.0
-
-Qsdk U-Boot can incorrectly leave the PCIe interface in an undefined
-state if bootm command is used instead of bootipq. This is caused by the
-not deinit of PCIe when bootm is called. Reset the PCIe before init
-anyway to fix this U-Boot bug.
-
-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
-Cc: stable@vger.kernel.org # v4.19+
----
- drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/drivers/pci/controller/dwc/pcie-qcom.c
-+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -296,6 +296,9 @@ static void qcom_pcie_deinit_2_1_0(struc
- reset_control_assert(res->por_reset);
- reset_control_assert(res->ext_reset);
- reset_control_assert(res->phy_reset);
-+
-+ writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
-+
- regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
- }
-
-@@ -308,6 +311,16 @@ static int qcom_pcie_init_2_1_0(struct q
- u32 val;
- int ret;
-
-+ /* reset the PCIe interface as uboot can leave it undefined state */
-+ reset_control_assert(res->pci_reset);
-+ reset_control_assert(res->axi_reset);
-+ reset_control_assert(res->ahb_reset);
-+ reset_control_assert(res->por_reset);
-+ reset_control_assert(res->ext_reset);
-+ reset_control_assert(res->phy_reset);
-+
-+ writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
-+
- ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies);
- if (ret < 0) {
- dev_err(dev, "cannot enable regulators\n");
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -371,6 +371,16 @@ config AT803X_PHY
+@@ -367,6 +367,16 @@ config AT803X_PHY
---help---
Currently supports the AT8030 and AT8035 model
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -479,6 +479,11 @@ config ICPLUS_PHY
+@@ -475,6 +475,11 @@ config ICPLUS_PHY
---help---
Currently supports the IP175C and IP1001 PHYs.
---help---
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
-@@ -88,6 +88,7 @@ obj-$(CONFIG_DP83848_PHY) += dp83848.o
+@@ -87,6 +87,7 @@ obj-$(CONFIG_DP83848_PHY) += dp83848.o
obj-$(CONFIG_DP83867_PHY) += dp83867.o
obj-$(CONFIG_FIXED_PHY) += fixed_phy.o
obj-$(CONFIG_ICPLUS_PHY) += icplus.o
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -784,16 +784,23 @@ static inline struct flexcan_priv *rx_of
+@@ -783,16 +783,23 @@ static inline struct flexcan_priv *rx_of
return container_of(offload, struct flexcan_priv, offload);
}
mb = flexcan_get_mb(priv, n);
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
-@@ -807,7 +814,7 @@ static unsigned int flexcan_mailbox_read
+@@ -806,7 +813,7 @@ static unsigned int flexcan_mailbox_read
code = reg_ctrl & FLEXCAN_MB_CODE_MASK;
if ((code != FLEXCAN_MB_CODE_RX_FULL) &&
(code != FLEXCAN_MB_CODE_RX_OVERRUN))
if (code == FLEXCAN_MB_CODE_RX_OVERRUN) {
/* This MB was overrun, we lost data */
-@@ -817,11 +824,17 @@ static unsigned int flexcan_mailbox_read
+@@ -816,11 +823,17 @@ static unsigned int flexcan_mailbox_read
} else {
reg_iflag1 = priv->read(®s->iflag1);
if (!(reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE))
/* increase timstamp to full 32 bit */
*timestamp = reg_ctrl << 16;
-@@ -840,7 +853,7 @@ static unsigned int flexcan_mailbox_read
+@@ -839,7 +852,7 @@ static unsigned int flexcan_mailbox_read
*(__be32 *)(cf->data + i) = data;
}
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
/* Clear IRQ */
if (n < 32)
-@@ -857,7 +870,7 @@ static unsigned int flexcan_mailbox_read
+@@ -856,7 +869,7 @@ static unsigned int flexcan_mailbox_read
*/
priv->read(®s->timer);
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -1570,7 +1570,6 @@ static int flexcan_probe(struct platform
+@@ -1569,7 +1569,6 @@ static int flexcan_probe(struct platform
struct net_device *dev;
struct flexcan_priv *priv;
struct regulator *reg_xceiver;
struct clk *clk_ipg = NULL, *clk_per = NULL;
struct flexcan_regs __iomem *regs;
int err, irq;
-@@ -1605,12 +1604,11 @@ static int flexcan_probe(struct platform
+@@ -1604,12 +1603,11 @@ static int flexcan_probe(struct platform
clock_freq = clk_get_rate(clk_per);
}
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -744,8 +744,6 @@ static void flexcan_irq_state(struct net
+@@ -743,8 +743,6 @@ static void flexcan_irq_state(struct net
u32 timestamp;
int err;
flt = reg_esr & FLEXCAN_ESR_FLT_CONF_MASK;
if (likely(flt == FLEXCAN_ESR_FLT_CONF_ACTIVE)) {
tx_state = unlikely(reg_esr & FLEXCAN_ESR_TX_WRN) ?
-@@ -765,6 +763,8 @@ static void flexcan_irq_state(struct net
+@@ -764,6 +762,8 @@ static void flexcan_irq_state(struct net
if (likely(new_state == priv->can.state))
return;
#define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7)
#define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6)
#define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE BIT(5)
-@@ -880,7 +880,7 @@ static inline u64 flexcan_read_reg_iflag
+@@ -879,7 +879,7 @@ static inline u64 flexcan_read_reg_iflag
u32 iflag1, iflag2;
iflag2 = priv->read(®s->iflag2) & priv->reg_imask2_default &
iflag1 = priv->read(®s->iflag1) & priv->reg_imask1_default;
return (u64)iflag2 << 32 | iflag1;
-@@ -930,7 +930,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -929,7 +929,7 @@ static irqreturn_t flexcan_irq(int irq,
reg_iflag2 = priv->read(®s->iflag2);
/* transmission complete interrupt */
u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl);
handled = IRQ_HANDLED;
-@@ -942,7 +942,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -941,7 +941,7 @@ static irqreturn_t flexcan_irq(int irq,
/* after sending a RTR frame MB is in RX mode */
priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
&priv->tx_mb->can_ctrl);
netif_wake_queue(dev);
}
-@@ -1321,7 +1321,7 @@ static int flexcan_open(struct net_devic
+@@ -1320,7 +1320,7 @@ static int flexcan_open(struct net_devic
priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
priv->reg_imask1_default = 0;
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -898,13 +898,13 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -897,13 +897,13 @@ static irqreturn_t flexcan_irq(int irq,
/* reception interrupt */
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
struct clk *clk_ipg;
struct clk *clk_per;
-@@ -879,9 +879,9 @@ static inline u64 flexcan_read_reg_iflag
+@@ -878,9 +878,9 @@ static inline u64 flexcan_read_reg_iflag
struct flexcan_regs __iomem *regs = priv->regs;
u32 iflag1, iflag2;
return (u64)iflag2 << 32 | iflag1;
}
-@@ -1228,8 +1228,8 @@ static int flexcan_chip_start(struct net
+@@ -1227,8 +1227,8 @@ static int flexcan_chip_start(struct net
/* enable interrupts atomically */
disable_irq(dev->irq);
priv->write(priv->reg_ctrl_default, ®s->ctrl);
enable_irq(dev->irq);
/* print chip status */
-@@ -1320,8 +1320,8 @@ static int flexcan_open(struct net_devic
+@@ -1319,8 +1319,8 @@ static int flexcan_open(struct net_devic
priv->tx_mb_idx = priv->mb_count - 1;
priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
priv->offload.mailbox_read = flexcan_mailbox_read;
-@@ -1333,12 +1333,12 @@ static int flexcan_open(struct net_devic
+@@ -1332,12 +1332,12 @@ static int flexcan_open(struct net_devic
imask = GENMASK_ULL(priv->offload.mb_last,
priv->offload.mb_first);
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -879,8 +879,7 @@ static inline u64 flexcan_read_reg_iflag
+@@ -878,8 +878,7 @@ static inline u64 flexcan_read_reg_iflag
struct flexcan_regs __iomem *regs = priv->regs;
u32 iflag1, iflag2;
iflag1 = priv->read(®s->iflag1) & priv->rx_mask1;
return (u64)iflag2 << 32 | iflag1;
-@@ -1229,7 +1228,7 @@ static int flexcan_chip_start(struct net
+@@ -1228,7 +1227,7 @@ static int flexcan_chip_start(struct net
disable_irq(dev->irq);
priv->write(priv->reg_ctrl_default, ®s->ctrl);
priv->write(priv->rx_mask1, ®s->imask1);
enable_irq(dev->irq);
/* print chip status */
-@@ -1320,9 +1319,6 @@ static int flexcan_open(struct net_devic
+@@ -1319,9 +1318,6 @@ static int flexcan_open(struct net_devic
priv->tx_mb_idx = priv->mb_count - 1;
priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
priv->offload.mailbox_read = flexcan_mailbox_read;
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
-@@ -1333,12 +1329,12 @@ static int flexcan_open(struct net_devic
+@@ -1332,12 +1328,12 @@ static int flexcan_open(struct net_devic
imask = GENMASK_ULL(priv->offload.mb_last,
priv->offload.mb_first);
struct clk *clk_ipg;
struct clk *clk_per;
-@@ -873,16 +873,15 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -872,16 +872,15 @@ static struct sk_buff *flexcan_mailbox_r
return skb;
}
}
static irqreturn_t flexcan_irq(int irq, void *dev_id)
-@@ -1053,6 +1052,7 @@ static int flexcan_chip_start(struct net
+@@ -1052,6 +1051,7 @@ static int flexcan_chip_start(struct net
struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv->regs;
u32 reg_mcr, reg_ctrl, reg_ctrl2, reg_mecr;
int err, i;
struct flexcan_mb __iomem *mb;
-@@ -1227,8 +1227,9 @@ static int flexcan_chip_start(struct net
+@@ -1226,8 +1226,9 @@ static int flexcan_chip_start(struct net
/* enable interrupts atomically */
disable_irq(dev->irq);
priv->write(priv->reg_ctrl_default, ®s->ctrl);
enable_irq(dev->irq);
/* print chip status */
-@@ -1322,19 +1323,14 @@ static int flexcan_open(struct net_devic
+@@ -1321,19 +1322,14 @@ static int flexcan_open(struct net_devic
priv->offload.mailbox_read = flexcan_mailbox_read;
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
u32 reg_ctrl_default;
struct clk *clk_ipg;
-@@ -891,7 +891,8 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -890,7 +890,8 @@ static irqreturn_t flexcan_irq(int irq,
struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv->regs;
irqreturn_t handled = IRQ_NONE;
enum can_state last_state = priv->can.state;
/* reception interrupt */
-@@ -925,10 +926,10 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -924,10 +925,10 @@ static irqreturn_t flexcan_irq(int irq,
}
}
u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl);
handled = IRQ_HANDLED;
-@@ -940,7 +941,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -939,7 +940,7 @@ static irqreturn_t flexcan_irq(int irq,
/* after sending a RTR frame MB is in RX mode */
priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
&priv->tx_mb->can_ctrl);
netif_wake_queue(dev);
}
-@@ -1227,7 +1228,7 @@ static int flexcan_chip_start(struct net
+@@ -1226,7 +1227,7 @@ static int flexcan_chip_start(struct net
/* enable interrupts atomically */
disable_irq(dev->irq);
priv->write(priv->reg_ctrl_default, ®s->ctrl);
priv->write(upper_32_bits(reg_imask), ®s->imask2);
priv->write(lower_32_bits(reg_imask), ®s->imask1);
enable_irq(dev->irq);
-@@ -1319,6 +1320,7 @@ static int flexcan_open(struct net_devic
+@@ -1318,6 +1319,7 @@ static int flexcan_open(struct net_devic
flexcan_get_mb(priv, FLEXCAN_TX_MB_RESERVED_OFF_FIFO);
priv->tx_mb_idx = priv->mb_count - 1;
priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -779,6 +779,23 @@ static void flexcan_irq_state(struct net
+@@ -778,6 +778,23 @@ static void flexcan_irq_state(struct net
dev->stats.rx_fifo_errors++;
}
static inline struct flexcan_priv *rx_offload_to_priv(struct can_rx_offload *offload)
{
return container_of(offload, struct flexcan_priv, offload);
-@@ -873,17 +890,6 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -872,17 +889,6 @@ static struct sk_buff *flexcan_mailbox_r
return skb;
}
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -791,11 +791,24 @@ static inline u64 flexcan_read64_mask(st
+@@ -790,11 +790,24 @@ static inline u64 flexcan_read64_mask(st
return reg & mask;
}
static inline struct flexcan_priv *rx_offload_to_priv(struct can_rx_offload *offload)
{
return container_of(offload, struct flexcan_priv, offload);
-@@ -932,7 +945,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -931,7 +944,7 @@ static irqreturn_t flexcan_irq(int irq,
}
}
/* transmission complete interrupt */
if (reg_iflag_tx & priv->tx_mask) {
-@@ -947,7 +960,7 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -946,7 +959,7 @@ static irqreturn_t flexcan_irq(int irq,
/* after sending a RTR frame MB is in RX mode */
priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
&priv->tx_mb->can_ctrl);
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -884,15 +884,10 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -883,15 +883,10 @@ static struct sk_buff *flexcan_mailbox_r
}
mark_as_read:
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -628,10 +628,10 @@ static int flexcan_get_berr_counter(cons
+@@ -627,10 +627,10 @@ static int flexcan_get_berr_counter(cons
static netdev_tx_t flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
const struct flexcan_priv *priv = netdev_priv(dev);
int i;
if (can_dropped_invalid_skb(dev, skb))
-@@ -639,18 +639,18 @@ static netdev_tx_t flexcan_start_xmit(st
+@@ -638,18 +638,18 @@ static netdev_tx_t flexcan_start_xmit(st
netif_stop_queue(dev);
priv->write(data, &priv->tx_mb->data[i / sizeof(u32)]);
}
-@@ -822,7 +822,7 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -821,7 +821,7 @@ static struct sk_buff *flexcan_mailbox_r
struct flexcan_regs __iomem *regs = priv->regs;
struct flexcan_mb __iomem *mb;
struct sk_buff *skb;
u32 reg_ctrl, reg_id, reg_iflag1;
int i;
-@@ -859,8 +859,8 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -858,8 +858,8 @@ static struct sk_buff *flexcan_mailbox_r
reg_ctrl = priv->read(&mb->can_ctrl);
}
skb = ERR_PTR(-ENOMEM);
goto mark_as_read;
}
-@@ -870,17 +870,17 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -869,17 +869,17 @@ static struct sk_buff *flexcan_mailbox_r
reg_id = priv->read(&mb->can_id);
if (reg_ctrl & FLEXCAN_MB_CNT_IDE)
};
struct flexcan_devtype_data {
-@@ -337,6 +367,30 @@ static const struct can_bittiming_const
+@@ -336,6 +366,30 @@ static const struct can_bittiming_const
.brp_inc = 1,
};
/* FlexCAN module is essentially modelled as a little-endian IP in most
* SoCs, i.e the registers as well as the message buffer areas are
* implemented in a little-endian fashion.
-@@ -631,7 +685,7 @@ static netdev_tx_t flexcan_start_xmit(st
+@@ -630,7 +684,7 @@ static netdev_tx_t flexcan_start_xmit(st
struct canfd_frame *cfd = (struct canfd_frame *)skb->data;
u32 can_id;
u32 data;
int i;
if (can_dropped_invalid_skb(dev, skb))
-@@ -649,6 +703,9 @@ static netdev_tx_t flexcan_start_xmit(st
+@@ -648,6 +702,9 @@ static netdev_tx_t flexcan_start_xmit(st
if (cfd->can_id & CAN_RTR_FLAG)
ctrl |= FLEXCAN_MB_CNT_RTR;
for (i = 0; i < cfd->len; i += sizeof(u32)) {
data = be32_to_cpup((__be32 *)&cfd->data[i]);
priv->write(data, &priv->tx_mb->data[i / sizeof(u32)]);
-@@ -859,7 +916,10 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -858,7 +915,10 @@ static struct sk_buff *flexcan_mailbox_r
reg_ctrl = priv->read(&mb->can_ctrl);
}
if (unlikely(!skb)) {
skb = ERR_PTR(-ENOMEM);
goto mark_as_read;
-@@ -874,9 +934,17 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -873,9 +933,17 @@ static struct sk_buff *flexcan_mailbox_r
else
cfd->can_id = (reg_id >> 18) & CAN_SFF_MASK;
for (i = 0; i < cfd->len; i += sizeof(u32)) {
__be32 data = cpu_to_be32(priv->read(&mb->data[i / sizeof(u32)]));
-@@ -1021,27 +1089,14 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -1020,27 +1088,14 @@ static irqreturn_t flexcan_irq(int irq,
static void flexcan_set_bittiming(struct net_device *dev)
{
if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
reg |= FLEXCAN_CTRL_LPB;
if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
-@@ -1052,9 +1107,102 @@ static void flexcan_set_bittiming(struct
+@@ -1051,9 +1106,102 @@ static void flexcan_set_bittiming(struct
netdev_dbg(dev, "writing ctrl=0x%08x\n", reg);
priv->write(reg, ®s->ctrl);
}
/* flexcan_chip_start
-@@ -1066,7 +1214,7 @@ static int flexcan_chip_start(struct net
+@@ -1065,7 +1213,7 @@ static int flexcan_chip_start(struct net
{
struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv->regs;
u64 reg_imask;
int err, i;
struct flexcan_mb __iomem *mb;
-@@ -1163,6 +1311,26 @@ static int flexcan_chip_start(struct net
+@@ -1162,6 +1310,26 @@ static int flexcan_chip_start(struct net
netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
priv->write(reg_ctrl, ®s->ctrl);
if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {
reg_ctrl2 = priv->read(®s->ctrl2);
reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS;
-@@ -1310,6 +1478,12 @@ static int flexcan_open(struct net_devic
+@@ -1309,6 +1477,12 @@ static int flexcan_open(struct net_devic
struct flexcan_priv *priv = netdev_priv(dev);
int err;
err = pm_runtime_get_sync(priv->dev);
if (err < 0)
return err;
-@@ -1322,7 +1496,10 @@ static int flexcan_open(struct net_devic
+@@ -1321,7 +1495,10 @@ static int flexcan_open(struct net_devic
if (err)
goto out_close;
priv->mb_count = (sizeof(priv->regs->mb[0]) / priv->mb_size) +
(sizeof(priv->regs->mb[1]) / priv->mb_size);
-@@ -1667,6 +1844,18 @@ static int flexcan_probe(struct platform
+@@ -1666,6 +1843,18 @@ static int flexcan_probe(struct platform
priv->devtype_data = devtype_data;
priv->reg_xceiver = reg_xceiver;
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
-@@ -703,9 +703,13 @@ static netdev_tx_t flexcan_start_xmit(st
+@@ -702,9 +702,13 @@ static netdev_tx_t flexcan_start_xmit(st
if (cfd->can_id & CAN_RTR_FLAG)
ctrl |= FLEXCAN_MB_CNT_RTR;
for (i = 0; i < cfd->len; i += sizeof(u32)) {
data = be32_to_cpup((__be32 *)&cfd->data[i]);
priv->write(data, &priv->tx_mb->data[i / sizeof(u32)]);
-@@ -936,6 +940,9 @@ static struct sk_buff *flexcan_mailbox_r
+@@ -935,6 +939,9 @@ static struct sk_buff *flexcan_mailbox_r
if (reg_ctrl & FLEXCAN_MB_CNT_EDL) {
cfd->len = can_dlc2len(get_canfd_dlc((reg_ctrl >> 16) & 0xf));
/* FLEXCAN memory error control register (MECR) bits */
#define FLEXCAN_MECR_ECRWRDIS BIT(31)
-@@ -1323,6 +1324,7 @@ static int flexcan_chip_start(struct net
+@@ -1322,6 +1323,7 @@ static int flexcan_chip_start(struct net
reg_fdctrl = priv->read(®s->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE;
reg_fdctrl &= ~(FLEXCAN_FDCTRL_MBDSR1(0x3) | FLEXCAN_FDCTRL_MBDSR0(0x3));
reg_mcr = priv->read(®s->mcr) & ~FLEXCAN_MCR_FDEN;
/* support BRS when set CAN FD mode
* 64 bytes payload per MB and 7 MBs per RAM block by default
-@@ -1332,10 +1334,14 @@ static int flexcan_chip_start(struct net
+@@ -1331,10 +1333,14 @@ static int flexcan_chip_start(struct net
reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;
reg_fdctrl |= FLEXCAN_FDCTRL_MBDSR1(0x3) | FLEXCAN_FDCTRL_MBDSR0(0x3);
reg_mcr |= FLEXCAN_MCR_FDEN;
}
if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {
-@@ -1853,7 +1859,7 @@ static int flexcan_probe(struct platform
+@@ -1852,7 +1858,7 @@ static int flexcan_probe(struct platform
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_TIMESTAMP_SUPPORT_FD) {
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
/* FLEXCAN FD Bit Timing register (FDCBT) bits */
#define FLEXCAN_FDCBT_FPRESDIV(x) (((x) & 0x3ff) << 20)
-@@ -1101,7 +1104,7 @@ static void flexcan_set_bittiming(struct
+@@ -1100,7 +1103,7 @@ static void flexcan_set_bittiming(struct
struct can_bittiming *bt = &priv->can.bittiming;
struct can_bittiming *dbt = &priv->can.data_bittiming;
struct flexcan_regs __iomem *regs = priv->regs;
reg = priv->read(®s->ctrl);
reg &= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP | FLEXCAN_CTRL_LOM);
-@@ -1173,6 +1176,19 @@ static void flexcan_set_bittiming(struct
+@@ -1172,6 +1175,19 @@ static void flexcan_set_bittiming(struct
FLEXCAN_FDCBT_FPROPSEG(dbt->prop_seg);
priv->write(reg_fdcbt, ®s->fdcbt);
if (bt->brp != dbt->brp)
netdev_warn(dev, "Warning!! data brp = %d and brp = %d don't match.\n"
"flexcan may not work. consider using different bitrate or data bitrate\n",
-@@ -1322,6 +1338,7 @@ static int flexcan_chip_start(struct net
+@@ -1321,6 +1337,7 @@ static int flexcan_chip_start(struct net
/* FDCTRL */
if (priv->can.ctrlmode_supported & CAN_CTRLMODE_FD) {
reg_fdctrl = priv->read(®s->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE;
static const struct flexcan_devtype_data fsl_vf610_devtype_data = {
.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP |
-@@ -1760,6 +1767,7 @@ out_put_node:
+@@ -1759,6 +1766,7 @@ out_put_node:
}
static const struct of_device_id flexcan_of_match[] = {
+
static const struct flexcan_devtype_data fsl_ls1021a_r2_devtype_data = {
.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
- FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |
-@@ -1776,6 +1783,7 @@ static const struct of_device_id flexcan
+ FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP,
+@@ -1775,6 +1782,7 @@ static const struct of_device_id flexcan
{ .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
#include <linux/regmap.h>
#define DRV_NAME "flexcan"
-@@ -1954,9 +1955,7 @@ static int __maybe_unused flexcan_suspen
+@@ -1955,9 +1956,7 @@ static int __maybe_unused flexcan_suspen
if (err)
return err;
} else {
}
netif_stop_queue(dev);
netif_device_detach(dev);
-@@ -1982,7 +1981,9 @@ static int __maybe_unused flexcan_resume
+@@ -1983,7 +1982,9 @@ static int __maybe_unused flexcan_resume
if (err)
return err;
} else {
/* FLEXCAN Bit Timing register (CBT) bits */
#define FLEXCAN_CBT_BTF BIT(31)
-@@ -1055,6 +1054,12 @@ static irqreturn_t flexcan_irq(int irq,
+@@ -1054,6 +1053,12 @@ static irqreturn_t flexcan_irq(int irq,
reg_esr = priv->read(®s->esr);
};
static const struct flexcan_devtype_data fsl_vf610_devtype_data = {
-@@ -504,6 +516,32 @@ static void flexcan_enable_wakeup_irq(st
+@@ -503,6 +515,32 @@ static void flexcan_enable_wakeup_irq(st
priv->write(reg_mcr, ®s->mcr);
}
static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv)
{
struct flexcan_regs __iomem *regs = priv->regs;
-@@ -513,9 +551,12 @@ static inline int flexcan_enter_stop_mod
+@@ -512,9 +550,12 @@ static inline int flexcan_enter_stop_mod
reg_mcr |= FLEXCAN_MCR_SLF_WAK;
priv->write(reg_mcr, ®s->mcr);
return flexcan_low_power_enter_ack(priv);
}
-@@ -526,8 +567,11 @@ static inline int flexcan_exit_stop_mode
+@@ -525,8 +566,11 @@ static inline int flexcan_exit_stop_mode
u32 reg_mcr;
/* remove stop request */
reg_mcr = priv->read(®s->mcr);
-@@ -1767,11 +1811,6 @@ static int flexcan_setup_stop_mode(struc
+@@ -1766,11 +1810,6 @@ static int flexcan_setup_stop_mode(struc
gpr_np->full_name, priv->stm.req_gpr, priv->stm.req_bit,
priv->stm.ack_gpr, priv->stm.ack_bit);
return 0;
out_put_node:
-@@ -1779,6 +1818,30 @@ out_put_node:
+@@ -1778,6 +1817,30 @@ out_put_node:
return ret;
}
static const struct of_device_id flexcan_of_match[] = {
{ .compatible = "fsl,imx8qm-flexcan", .data = &fsl_imx8qm_devtype_data, },
{ .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
-@@ -1921,9 +1984,19 @@ static int flexcan_probe(struct platform
+@@ -1920,9 +1983,19 @@ static int flexcan_probe(struct platform
devm_can_led_init(dev);
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_SETUP_STOP_MODE) {
//
// Based on code originally by Andrey Volkov <avolkov@varma-el.com>
-@@ -385,6 +386,10 @@ static const struct flexcan_devtype_data
- FLEXCAN_QUIRK_USE_OFF_TIMESTAMP,
+@@ -384,6 +385,10 @@ static const struct flexcan_devtype_data
+ FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_USE_OFF_TIMESTAMP,
};
+static struct flexcan_devtype_data fsl_s32v234_devtype_data = {
static const struct can_bittiming_const flexcan_bittiming_const = {
.name = DRV_NAME,
.tseg1_min = 4,
-@@ -1853,6 +1858,8 @@ static const struct of_device_id flexcan
+@@ -1852,6 +1857,8 @@ static const struct of_device_id flexcan
{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
if (writable)
pte = kvm_s2pte_mkwrite(pte);
-@@ -2361,7 +2363,7 @@ int kvm_arch_prepare_memory_region(struc
+@@ -2362,7 +2364,7 @@ int kvm_arch_prepare_memory_region(struc
ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
vm_end - vm_start,
if (kvm_is_device_pfn(pfn)) {
mem_type = PAGE_S2_DEVICE;
flags |= KVM_S2PTE_FLAG_IS_IOMAP;
-@@ -2351,6 +2395,9 @@ int kvm_arch_prepare_memory_region(struc
+@@ -2352,6 +2396,9 @@ int kvm_arch_prepare_memory_region(struc
gpa_t gpa = mem->guest_phys_addr +
(vm_start - mem->userspace_addr);
phys_addr_t pa;
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
pa += vm_start - vma->vm_start;
-@@ -2361,9 +2408,13 @@ int kvm_arch_prepare_memory_region(struc
+@@ -2362,9 +2409,13 @@ int kvm_arch_prepare_memory_region(struc
goto out;
}
* All 3.1 IP version constants are greater than the 3.0 IP
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
-@@ -3525,6 +3525,10 @@ int dwc3_gadget_init(struct dwc3 *dwc)
+@@ -3543,6 +3543,10 @@ int dwc3_gadget_init(struct dwc3 *dwc)
dwc->gadget.sg_supported = true;
dwc->gadget.name = "dwc3-gadget";
dwc->gadget.lpm_capable = true;
drivers/net/phy/at803x.c | 91 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 91 insertions(+)
-diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
-index 31cd7d8a5a1b5..134c894ccf800 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -14,6 +14,8 @@
#define AT803X_DEBUG_REG_0 0x00
#define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15)
-@@ -243,10 +254,72 @@ static int at803x_resume(struct phy_device *phydev)
+@@ -243,10 +254,72 @@ static int at803x_resume(struct phy_devi
return phy_modify(phydev, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 0);
}
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
-@@ -394,6 +467,10 @@ static int at803x_read_status(struct phy_device *phydev)
+@@ -394,6 +467,10 @@ static int at803x_read_status(struct phy
{
int ss, err, old_link = phydev->link;
/* Update the link, but return if there was an error */
err = genphy_update_link(phydev);
if (err)
-@@ -448,6 +525,19 @@ static int at803x_read_status(struct phy_device *phydev)
+@@ -448,6 +525,19 @@ static int at803x_read_status(struct phy
return 0;
}
static struct phy_driver at803x_driver[] = {
{
/* ATHEROS 8035 */
-@@ -491,6 +581,7 @@ static struct phy_driver at803x_driver[] = {
+@@ -491,6 +581,7 @@ static struct phy_driver at803x_driver[]
.suspend = at803x_suspend,
.resume = at803x_resume,
/* PHY_GBIT_FEATURES */