drm/amd/display: add back removed hack for mpcc add

A previous changed removed the hack to match mpcc_idd
with mi instance. This causes pstate hang on resume
from hibernate for yet unknown reason. Add the hack
back for now to work around the issue. More debugging
required in init_hw to root cause the hang.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
index 8e767c84359c7f673bf67ff65fd0430f473015dd..6e56fa3a135b9deba305a6ffdca2fe71c415b1ed 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
@@ -279,6 +279,18 @@ static int mpc10_mpcc_add(struct mpc *mpc, struct mpcc_cfg *cfg)
        if (z_idx == cfg->tree_cfg->num_pipes) {
                ASSERT(cfg->z_index <= cfg->tree_cfg->num_pipes);
                mpcc_id = mpc10_get_idle_mpcc_id(mpc10);
+
+               /*
+                * TODO: remove hack
+                * Note: currently there is a bug in init_hw such that
+                * on resume from hibernate, BIOS sets up MPCC0, and
+                * we do mpcc_remove but the mpcc cannot go to idle
+                * after remove. This cause us to pick mpcc1 here,
+                * which causes a pstate hang for yet unknown reason.
+                */
+               mpcc_id = cfg->dpp_id;
+               /* end hack*/
+
                ASSERT(!(mpc10->mpcc_in_use_mask & 1 << mpcc_id));
 
                if (mpc->ctx->dc->debug.sanity_checks)