The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
IO_ADDR_W &= ~(SET_ALE | SET_CLE);
- *nCE &= 0xFFFB;
if (ctrl & NAND_NCE)
+ *nCE &= 0xFFFB;
+ else
*nCE |= 0x0004;
+
if (ctrl & NAND_CLE)
IO_ADDR_W |= SET_CLE;
if (ctrl & NAND_ALE)
gpio->pclrr_timer = 0;
gpio->podr_timer = 0;
- nand->chip_delay = 50;
+ nand->chip_delay = 60;
nand->ecc.mode = NAND_ECC_SOFT;
nand->cmd_ctrl = nand_hwcontrol;
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
IO_ADDR_W &= ~(SET_ALE | SET_CLE);
- *nCE &= 0xFFFB;
if (ctrl & NAND_NCE)
+ *nCE &= 0xFFFB;
+ else
*nCE |= 0x0004;
+
if (ctrl & NAND_CLE)
IO_ADDR_W |= SET_CLE;
if (ctrl & NAND_ALE)
gpio->pclrr_timer = 0;
gpio->podr_timer = 0;
- nand->chip_delay = 50;
+ nand->chip_delay = 60;
nand->ecc.mode = NAND_ECC_SOFT;
nand->cmd_ctrl = nand_hwcontrol;