{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt2400pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Write failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
/*
* Write the data into the BBP.
rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1);
rt2x00pci_register_write(rt2x00dev, BBPCSR, reg);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "BBPCSR register busy. Write failed.\n");
}
static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt2400pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
/*
* Write the request into the BBP.
* Wait until the BBP becomes ready.
*/
reg = rt2400pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
- *value = 0xff;
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
*value = rt2x00_get_field32(reg, BBPCSR_VALUE);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
+ *value = 0xff;
}
static void rt2400pci_rf_write(struct rt2x00_dev *rt2x00dev,
if (!word)
return;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2x00pci_register_read(rt2x00dev, RFCSR, ®);
if (!rt2x00_get_field32(reg, RFCSR_BUSY))
udelay(REGISTER_BUSY_DELAY);
}
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "RFCSR register busy. Write failed.\n");
return;
rt2x00pci_register_write(rt2x00dev, RFCSR, reg);
rt2x00_rf_write(rt2x00dev, word, value);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
}
static void rt2400pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt2500pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Write failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
/*
* Write the data into the BBP.
rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1);
rt2x00pci_register_write(rt2x00dev, BBPCSR, reg);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "BBPCSR register busy. Write failed.\n");
}
static void rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt2500pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
/*
* Write the request into the BBP.
* Wait until the BBP becomes ready.
*/
reg = rt2500pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, BBPCSR_BUSY)) {
- ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
- *value = 0xff;
- return;
- }
+ if (rt2x00_get_field32(reg, BBPCSR_BUSY))
+ goto exit_fail;
*value = rt2x00_get_field32(reg, BBPCSR_VALUE);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n");
+ *value = 0xff;
}
static void rt2500pci_rf_write(struct rt2x00_dev *rt2x00dev,
if (!word)
return;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2x00pci_register_read(rt2x00dev, RFCSR, ®);
if (!rt2x00_get_field32(reg, RFCSR_BUSY))
udelay(REGISTER_BUSY_DELAY);
}
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "RFCSR register busy. Write failed.\n");
return;
rt2x00pci_register_write(rt2x00dev, RFCSR, reg);
rt2x00_rf_write(rt2x00dev, word, value);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
}
static void rt2500pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
* between each attampt. When the busy bit is still set at that time,
* the access attempt is considered to have failed,
* and we will print an error.
- * If the usb_cache_mutex is already held then the _lock variants must
+ * If the csr_mutex is already held then the _lock variants must
* be used instead.
*/
static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
{
u16 reg;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
/*
* Wait until the BBP becomes ready.
rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return;
exit_fail:
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
}
{
u16 reg;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
/*
* Wait until the BBP becomes ready.
rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®);
*value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return;
exit_fail:
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
*value = 0xff;
if (!word)
return;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, ®);
udelay(REGISTER_BUSY_DELAY);
}
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
return;
rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
rt2x00_rf_write(rt2x00dev, word, value);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
}
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
} csr;
/*
- * Mutex to protect register accesses on USB devices.
- * There are 2 reasons this is needed, one is to ensure
- * use of the csr_cache (for USB devices) by one thread
- * isn't corrupted by another thread trying to access it.
- * The other is that access to BBP and RF registers
- * require multiple BUS transactions and if another thread
- * attempted to access one of those registers at the same
- * time one of the writes could silently fail.
- */
- struct mutex usb_cache_mutex;
+ * Mutex to protect register accesses.
+ * For PCI and USB devices it protects against concurrent indirect
+ * register access (BBP, RF, MCU) since accessing those
+ * registers require multiple calls to the CSR registers.
+ * For USB devices it also protects the csr_cache since that
+ * field is used for normal CSR access and it cannot support
+ * multiple callers simultaneously.
+ */
+ struct mutex csr_mutex;
/*
* Current packet filter configuration for the device.
{
int retval = -ENOMEM;
+ mutex_init(&rt2x00dev->csr_mutex);
+
/*
* Make room for rt2x00_intf inside the per-interface
* structure ieee80211_vif.
{
int status;
- BUG_ON(!mutex_is_locked(&rt2x00dev->usb_cache_mutex));
+ BUG_ON(!mutex_is_locked(&rt2x00dev->csr_mutex));
/*
* Check for Cache availability.
{
int status;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
status = rt2x00usb_vendor_req_buff_lock(rt2x00dev, request,
requesttype, offset, buffer,
buffer_length, timeout);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return status;
}
unsigned char *tb;
u16 off, len, bsize;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
tb = (char *)buffer;
off = offset;
off += bsize;
}
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return status;
}
rt2x00dev->dev = &usb_intf->dev;
rt2x00dev->ops = ops;
rt2x00dev->hw = hw;
- mutex_init(&rt2x00dev->usb_cache_mutex);
rt2x00dev->usb_maxpacket =
usb_maxpacket(usb_dev, usb_sndbulkpipe(usb_dev, 1), 1);
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt61pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
- ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
+ goto exit_fail;
/*
* Write the data into the BBP.
rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
rt2x00pci_register_write(rt2x00dev, PHY_CSR3, reg);
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
}
static void rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev,
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
/*
* Wait until the BBP becomes ready.
*/
reg = rt61pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
- ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
- return;
- }
+ if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
+ goto exit_fail;
/*
* Write the request into the BBP.
* Wait until the BBP becomes ready.
*/
reg = rt61pci_bbp_check(rt2x00dev);
- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
- ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
- *value = 0xff;
- return;
- }
+ if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
+ goto exit_fail;
*value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
+ *value = 0xff;
}
static void rt61pci_rf_write(struct rt2x00_dev *rt2x00dev,
if (!word)
return;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2x00pci_register_read(rt2x00dev, PHY_CSR4, ®);
if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
udelay(REGISTER_BUSY_DELAY);
}
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
return;
rt2x00pci_register_write(rt2x00dev, PHY_CSR4, reg);
rt2x00_rf_write(rt2x00dev, word, value);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
}
#ifdef CONFIG_RT2X00_LIB_LEDS
{
u32 reg;
+ mutex_lock(&rt2x00dev->csr_mutex);
+
rt2x00pci_register_read(rt2x00dev, H2M_MAILBOX_CSR, ®);
- if (rt2x00_get_field32(reg, H2M_MAILBOX_CSR_OWNER)) {
- ERROR(rt2x00dev, "mcu request error. "
- "Request 0x%02x failed for token 0x%02x.\n",
- command, token);
- return;
- }
+ if (rt2x00_get_field32(reg, H2M_MAILBOX_CSR_OWNER))
+ goto exit_fail;
rt2x00_set_field32(®, H2M_MAILBOX_CSR_OWNER, 1);
rt2x00_set_field32(®, H2M_MAILBOX_CSR_CMD_TOKEN, token);
rt2x00_set_field32(®, HOST_CMD_CSR_HOST_COMMAND, command);
rt2x00_set_field32(®, HOST_CMD_CSR_INTERRUPT_MCU, 1);
rt2x00pci_register_write(rt2x00dev, HOST_CMD_CSR, reg);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ return;
+
+exit_fail:
+ mutex_unlock(&rt2x00dev->csr_mutex);
+
+ ERROR(rt2x00dev,
+ "mcu request error. Request 0x%02x failed for token 0x%02x.\n",
+ command, token);
}
#endif /* CONFIG_RT2X00_LIB_LEDS */
* between each attampt. When the busy bit is still set at that time,
* the access attempt is considered to have failed,
* and we will print an error.
- * The _lock versions must be used if you already hold the usb_cache_mutex
+ * The _lock versions must be used if you already hold the csr_mutex
*/
static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
const unsigned int offset, u32 *value)
{
u32 reg;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
/*
* Wait until the BBP becomes ready.
rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return;
exit_fail:
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
}
{
u32 reg;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
/*
* Wait until the BBP becomes ready.
goto exit_fail;
*value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
return;
exit_fail:
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
*value = 0xff;
if (!word)
return;
- mutex_lock(&rt2x00dev->usb_cache_mutex);
+ mutex_lock(&rt2x00dev->csr_mutex);
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, ®);
udelay(REGISTER_BUSY_DELAY);
}
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+ mutex_unlock(&rt2x00dev->csr_mutex);
ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
return;
rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
rt2x00_rf_write(rt2x00dev, word, value);
- mutex_unlock(&rt2x00dev->usb_cache_mutex);
+
+ mutex_unlock(&rt2x00dev->csr_mutex);
}
#ifdef CONFIG_RT2X00_LIB_DEBUGFS