--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -951,25 +951,60 @@ static bool ath9k_hw_set_global_txtimeou
+@@ -914,6 +914,13 @@ static void ath9k_hw_init_interrupt_mask
+ }
+ }
+
++static void ath9k_hw_set_sifs_time(struct ath_hw *ah, u32 us)
++{
++ u32 val = ath9k_hw_mac_to_clks(ah, us - 2);
++ val = min(val, (u32) 0xFFFF);
++ REG_WRITE(ah, AR_D_GBL_IFS_SIFS, val);
++}
++
+ static void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
+ {
+ u32 val = ath9k_hw_mac_to_clks(ah, us);
+@@ -951,25 +958,60 @@ static bool ath9k_hw_set_global_txtimeou
void ath9k_hw_init_global_settings(struct ath_hw *ah)
{
/*
* Workaround for early ACK timeouts, add an offset to match the
-@@ -981,11 +1016,19 @@ void ath9k_hw_init_global_settings(struc
+@@ -981,11 +1023,20 @@ void ath9k_hw_init_global_settings(struc
if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
acktimeout += 64 - sifstime - ah->slottime;
- ath9k_hw_setslottime(ah, ah->slottime);
++ ath9k_hw_set_sifs_time(ah, sifstime);
+ ath9k_hw_setslottime(ah, slottime);
ath9k_hw_set_ack_timeout(ah, acktimeout);
ath9k_hw_set_cts_timeout(ah, acktimeout);
{
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1633,9 +1633,13 @@ int ath9k_hw_reset(struct ath_hw *ah, st
+@@ -1641,9 +1641,13 @@ int ath9k_hw_reset(struct ath_hw *ah, st
ath9k_hw_init_global_settings(ah);
/*
* Code specific to AR9003, we stuff these here to avoid callbacks
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -600,7 +600,6 @@
+
+ #define AR_D_GBL_IFS_SIFS 0x1030
+ #define AR_D_GBL_IFS_SIFS_M 0x0000FFFF
+-#define AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR 0x000003AB
+ #define AR_D_GBL_IFS_SIFS_RESV0 0xFFFFFFFF
+
+ #define AR_D_TXBLK_BASE 0x1038
+@@ -616,12 +615,10 @@
+ #define AR_D_GBL_IFS_SLOT 0x1070
+ #define AR_D_GBL_IFS_SLOT_M 0x0000FFFF
+ #define AR_D_GBL_IFS_SLOT_RESV0 0xFFFF0000
+-#define AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR 0x00000420
+
+ #define AR_D_GBL_IFS_EIFS 0x10b0
+ #define AR_D_GBL_IFS_EIFS_M 0x0000FFFF
+ #define AR_D_GBL_IFS_EIFS_RESV0 0xFFFF0000
+-#define AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR 0x0000A5EB
+
+ #define AR_D_GBL_IFS_MISC 0x10f0
+ #define AR_D_GBL_IFS_MISC_LFSR_SLICE_SEL 0x00000007
+@@ -1477,7 +1474,6 @@ enum {
+ #define AR_TIME_OUT_ACK_S 0
+ #define AR_TIME_OUT_CTS 0x3FFF0000
+ #define AR_TIME_OUT_CTS_S 16
+-#define AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR 0x16001D56
+
+ #define AR_RSSI_THR 0x8018
+ #define AR_RSSI_THR_MASK 0x000000FF
+@@ -1493,7 +1489,6 @@ enum {
+ #define AR_USEC_TX_LAT_S 14
+ #define AR_USEC_RX_LAT 0x1F800000
+ #define AR_USEC_RX_LAT_S 23
+-#define AR_USEC_ASYNC_FIFO_DUR 0x12e00074
+
+ #define AR_RESET_TSF 0x8020
+ #define AR_RESET_TSF_ONCE 0x01000000