MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU

The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at
200MHz, but they do not have a clkfreq nvram variable set to the
correct value. This adds a workaround for these devices.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5843/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 5e5d797fa90a6ab3d149200c8c80eaaa70e25438..2c85d9254b5e91d017e6a36351294e0c7b931d74 100644 (file)
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -28,6 +28,7 @@
 #include <asm/time.h>
 #include <bcm47xx.h>
 #include <bcm47xx_nvram.h>
+#include <bcm47xx_board.h>
 
 void __init plat_time_init(void)
 {
@@ -35,6 +36,7 @@ void __init plat_time_init(void)
        u16 chip_id = 0;
        char buf[10];
        int len;
+       enum bcm47xx_board board = bcm47xx_board_get();
 
        /*
         * Use deterministic values for initial counter interrupt
@@ -64,6 +66,15 @@ void __init plat_time_init(void)
                        hz = 100000000;
        }
 
+       switch (board) {
+       case BCM47XX_BOARD_ASUS_WL520GC:
+       case BCM47XX_BOARD_ASUS_WL520GU:
+               hz = 100000000;
+               break;
+       default:
+               break;
+       }
+
        if (!hz)
                hz = 100000000;