drm/i915/guc: Add debug capture of GuC exception
authorRobert M. Fosha <robert.m.fosha@intel.com>
Tue, 25 Jun 2019 16:41:07 +0000 (09:41 -0700)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 25 Jun 2019 19:17:22 +0000 (20:17 +0100)
Detect GuC firmware load failure due to an exception during execution
in GuC firmware. Output the GuC EIP where exception occurred to dmesg
for GuC debug information.

v2: correct typos, change debug message and error code returned for
GuC exception (Michal)

Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625164107.21512-1-robert.m.fosha@intel.com
drivers/gpu/drm/i915/intel_guc_fw.c
drivers/gpu/drm/i915/intel_guc_reg.h

index 72cdafd9636add86803be876071f6ce8681baa87..970f39ef248bb0a88d139491ac0b4b3672dd2fb9 100644 (file)
@@ -197,6 +197,7 @@ static inline bool guc_ready(struct intel_guc *guc, u32 *status)
 
 static int guc_wait_ucode(struct intel_guc *guc)
 {
+       struct drm_i915_private *i915 = guc_to_i915(guc);
        u32 status;
        int ret;
 
@@ -216,6 +217,12 @@ static int guc_wait_ucode(struct intel_guc *guc)
                ret = -ENOEXEC;
        }
 
+       if ((status & GS_UKERNEL_MASK) == GS_UKERNEL_EXCEPTION) {
+               DRM_ERROR("GuC firmware exception. EIP: %#x\n",
+                         intel_uncore_read(&i915->uncore, SOFT_SCRATCH(13)));
+               ret = -ENXIO;
+       }
+
        if (ret == 0 && !guc_xfer_completed(guc, &status)) {
                DRM_ERROR("GuC is ready, but the xfer %08x is incomplete\n",
                          status);
index a214f8b71929b5958121059c3153dd75bce4030b..d90b88fadb5e5e10372a6c9a5cfe482e524879a8 100644 (file)
@@ -37,6 +37,7 @@
 #define   GS_UKERNEL_MASK                (0xFF << GS_UKERNEL_SHIFT)
 #define   GS_UKERNEL_LAPIC_DONE                  (0x30 << GS_UKERNEL_SHIFT)
 #define   GS_UKERNEL_DPC_ERROR           (0x60 << GS_UKERNEL_SHIFT)
+#define   GS_UKERNEL_EXCEPTION           (0x70 << GS_UKERNEL_SHIFT)
 #define   GS_UKERNEL_READY               (0xF0 << GS_UKERNEL_SHIFT)
 #define   GS_MIA_SHIFT                 16
 #define   GS_MIA_MASK                    (0x07 << GS_MIA_SHIFT)