static const struct platform_notify_dev_map dev_map[] = {
{
.bus_id = "fsl-cpm-fcc",
- .rtn = mpc8272ads_fixup_enet_pdata
+ .rtn = mpc8272ads_fixup_enet_pdata,
},
{
.bus_id = "fsl-cpm-scc:uart",
- .rtn = mpc
+ .rtn = mpc8272ads_fixup_uart_pdata,
},
{
.bus_id = NULL
struct platform_device* pdev = NULL;
if(index) { /*assume SCC4 here*/
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
- pinfo = &mpc8272<F12>_uart_pdata[1];
+ pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
} else { /*over SCC1*/
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
- pinfo = &mpc8272_uart_pdata[0];
+ pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
}
pinfo->uart_clk = bd->bi_intfreq;
pdev->dev.platform_data = pinfo;
- ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+ ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
return NULL;
}
.num_resources = 3,
.resource = (struct resource[]) {
{
- .name = "scc_mem",
+ .name = "regs",
.start = 0x11A00,
.end = 0x11A1F,
.flags = IORESOURCE_MEM,
},
{
- .name = "scc_pram",
+ .name = "pram",
.start = 0x8000,
.end = 0x80ff,
.flags = IORESOURCE_MEM,
.num_resources = 3,
.resource = (struct resource[]) {
{
- .name = "scc_mem",
+ .name = "regs",
.start = 0x11A20,
.end = 0x11A3F,
.flags = IORESOURCE_MEM,
},
{
- .name = "scc_pram",
+ .name = "pram",
.start = 0x8100,
.end = 0x81ff,
.flags = IORESOURCE_MEM,
.num_resources = 3,
.resource = (struct resource[]) {
{
- .name = "scc_mem",
+ .name = "regs",
.start = 0x11A40,
.end = 0x11A5F,
.flags = IORESOURCE_MEM,
},
{
- .name = "scc_pram",
+ .name = "pram",
.start = 0x8200,
.end = 0x82ff,
.flags = IORESOURCE_MEM,
.num_resources = 3,
.resource = (struct resource[]) {
{
- .name = "scc_mem",
+ .name = "regs",
.start = 0x11A60,
.end = 0x11A7F,
.flags = IORESOURCE_MEM,
},
{
- .name = "scc_pram",
+ .name = "pram",
.start = 0x8300,
.end = 0x83ff,
.flags = IORESOURCE_MEM,
.ppc_sys_name = "8272",
.mask = 0x0000ff00,
.value = 0x00000c00,
- .num_devices = 11,
+ .num_devices = 12,
.device_list = (enum ppc_sys_devices[])
{
MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- MPC82xx_CPM_USB, MPC82xx_SEC1,
+ MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
+ MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+ MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
},
},
/* below is a list of the 8280 family of processors */
struct fs_uart_platform_info *pdata;
struct platform_device* pdev = early_uart_get_pdev(co->index);
- port =
- (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
- pinfo = (struct uart_cpm_port *)port;
if (!pdev) {
pr_info("cpm_uart: console: compat mode\n");
/* compatibility - will be cleaned up */
cpm_uart_init_portdesc();
+ }
+ port =
+ (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
+ pinfo = (struct uart_cpm_port *)port;
+ if (!pdev) {
if (pinfo->set_lineif)
pinfo->set_lineif(pinfo);
} else {
L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
if (is_con) {
mem_addr = alloc_bootmem(memsz);
- dma_addr = mem_addr;
+ dma_addr = virt_to_bus(mem_addr);
}
else
mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,