drm/gf100-/bar: don't fill in bar->alloc until after all vm setup done

gpuobj has a condition of (bar && bar->alloc) around usage to avoid
some nasty ordering issues (which, i've now been reminded to add a
todo about fixing...) between bar and vm.

The bar->alloc part of the condition isn't currently necessary (it
used to be, another change made bar always NULL where it matters),
so we got lucky.  That won't be the case for much longer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
index 05a278bab2477f0b1d12f25d73e3c47b1a054873..8320ee0509c371082b64a98b50eb12da925cbfda 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
@@ -153,8 +153,6 @@ nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
                ret = nvc0_bar_init_vm(priv, &priv->bar[0], 3);
                if (ret)
                        return ret;
-               priv->base.alloc = nouveau_bar_alloc;
-               priv->base.kmap = nvc0_bar_kmap;
        }
 
        /* BAR1 */
@@ -162,6 +160,10 @@ nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
        if (ret)
                return ret;
 
+       if (has_bar3) {
+               priv->base.alloc = nouveau_bar_alloc;
+               priv->base.kmap = nvc0_bar_kmap;
+       }
        priv->base.umap = nvc0_bar_umap;
        priv->base.unmap = nvc0_bar_unmap;
        priv->base.flush = nv84_bar_flush;