Since the following commit, the PLL calculations are done earlier, so
the code following the comment doesn't do anything PLL or encoder
related. It only updates the primary plane now.
commit
f3019a4d92f08b2dd92443a4b567a066a51c6ec0
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date: Wed Oct 29 11:32:37 2014 +0200
drm/i915: Remove crtc_mode_set() hook
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
modeset_update_crtc_power_domains(state);
- /* Set up the DPLL and any encoders state that needs to adjust or depend
- * on the DPLL.
- */
for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) {
struct drm_plane *primary = intel_crtc->base.primary;
int vdisplay, hdisplay;