drm/amd/display: Use pipe_control_lock instead of tg lock.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 82572863acab747759e3d8c2787a1e2cffc1f8df..52e31e798921e96a5a16ce2ccce5353139a26638 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1940,7 +1940,7 @@ static void dcn10_apply_ctx_for_surface(
 
        tg = top_pipe_to_program->stream_res.tg;
 
-       tg->funcs->lock(tg);
+       dcn10_pipe_control_lock(dc, top_pipe_to_program, true);
 
        if (num_planes == 0) {
 
@@ -1989,7 +1989,7 @@ static void dcn10_apply_ctx_for_surface(
        if (num_planes > 0)
                program_all_pipe_in_tree(dc, top_pipe_to_program, context);
 
-       tg->funcs->unlock(tg);
+       dcn10_pipe_control_lock(dc, top_pipe_to_program, false);
 
        if (num_planes == 0)
                false_optc_underflow_wa(dc, stream, tg);