--- /dev/null
+#
+# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+BL32_BASE ?= 0x9e800000
+$(eval $(call add_define,BL32_BASE))
+
+PRELOADED_BL33_BASE ?= 0x80080000
+$(eval $(call add_define,PRELOADED_BL33_BASE))
+
+K3_HW_CONFIG_BASE ?= 0x82000000
+$(eval $(call add_define,K3_HW_CONFIG_BASE))
+
+PLAT_INCLUDES += \
+ -Iplat/ti/k3/board/generic/include \
--- /dev/null
+/*
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __BOARD_DEF_H__
+#define __BOARD_DEF_H__
+
+/* The ports must be in order and contiguous */
+#define K3_CLUSTER0_CORE_COUNT 2
+#define K3_CLUSTER0_MSMC_PORT 0
+
+#define K3_CLUSTER1_CORE_COUNT 2
+#define K3_CLUSTER1_MSMC_PORT 1
+
+#define K3_CLUSTER2_CORE_COUNT 2
+#define K3_CLUSTER2_MSMC_PORT 2
+
+#define K3_CLUSTER3_CORE_COUNT 2
+#define K3_CLUSTER3_MSMC_PORT 3
+
+/*
+ * This RAM will be used for the bootloader including code, bss, and stacks.
+ * It may need to be increased if BL31 grows in size.
+ */
+#define SEC_SRAM_BASE 0x70000000 /* Base of MSMC SRAM */
+#define SEC_SRAM_SIZE 0x00020000 /* 128k */
+
+#define PLAT_MAX_OFF_STATE 2
+#define PLAT_MAX_RET_STATE 1
+
+#endif /* __BOARD_DEF_H__ */
#
PLAT_PATH := plat/ti/k3
+TARGET_BOARD ?= generic
include ${PLAT_PATH}/common/plat_common.mk
+include ${PLAT_PATH}/board/${TARGET_BOARD}/board.mk
# modify BUILD_PLAT to point to board specific build directory
BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_BOARD}/${BUILD_TYPE}