ath79: add missing clock name strings in SoC dtsi
authorShiji Yang <yangshiji66@qq.com>
Thu, 27 Oct 2022 05:17:12 +0000 (13:17 +0800)
committerHauke Mehrtens <hauke@hauke-m.de>
Wed, 9 Nov 2022 21:55:33 +0000 (22:55 +0100)
For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
target/linux/ath79/dts/ar9330.dtsi
target/linux/ath79/dts/ar9331.dtsi
target/linux/ath79/dts/qca953x.dtsi
target/linux/ath79/dts/qca955x.dtsi
target/linux/ath79/dts/qca956x.dtsi

index aed8e205adacdbe6aa5e2e6a7124c345f5149852..9df80e1d5ee87a1dc492abff61ce9045521a1534 100644 (file)
                bootargs = "console=ttyATH0,115200";
        };
 
+       ref: ref {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-output-names = "ref";
+       };
+
        ahb {
                apb {
                        ddr_ctrl: memory-controller@18000000 {
                                compatible = "qca,ar9330-pll";
                                reg = <0x18050000 0x100>;
 
+                               clocks = <&ref>;
+                               clock-names = "ref";
+
                                #clock-cells = <1>;
+                               clock-output-names = "cpu", "ddr", "ahb";
                        };
 
                        wdt: wdt@18060008 {
index 2141f338635b7beb629359db2aca6d152da009c4..d363130278abd4046fd603edb6c6ad78e3b6c6a8 100644 (file)
@@ -4,9 +4,4 @@
 
 / {
        compatible = "qca,ar9331";
-
-       ref: ref {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-       };
 };
index 745c736b745ddc8a897419c781f3a795d1df3190..c155e3419f328cea64a19fafeb0b20fcf68f2ffe 100644 (file)
 
                                #clock-cells = <1>;
                                clock-output-names = "cpu", "ddr", "ahb";
+
                                clocks = <&extosc>;
+                               clock-names = "ref";
                        };
 
                        wdt: wdt@18060008 {
index b6e08f9f12a454d4d97e3c92641ea369e0858357..0541c4e373197d4c0b9ee86eb3968e6f5b8b75ed 100644 (file)
                                clock-output-names = "cpu", "ddr", "ahb";
 
                                clocks = <&extosc>;
+                               clock-names = "ref";
                        };
 
                        wdt: wdt@18060008 {
index f2452e9dc7e8dc91e0f6d0b385dfcaec792b40f6..0ebd5ff5be5d2beb286c26577f2472f00d295253 100644 (file)
@@ -95,6 +95,7 @@
                                clock-output-names = "cpu", "ddr", "ahb";
 
                                clocks = <&extosc>;
+                               clock-names = "ref";
                        };
 
                        wdt: wdt@18060008 {