This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the second controller has no slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
.resource = pxa3xx_resource_ssp4,
.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
};
+
+static struct resource pxa3xx_resources_mci2[] = {
+ [0] = {
+ .start = 0x42000000,
+ .end = 0x42000fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_MMC2,
+ .end = IRQ_MMC2,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = 93,
+ .end = 93,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = 94,
+ .end = 94,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct platform_device pxa3xx_device_mci2 = {
+ .name = "pxa2xx-mci",
+ .id = 1,
+ .dev = {
+ .dma_mask = &pxamci_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
+ .resource = pxa3xx_resources_mci2,
+};
+
+void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
+{
+ pxa_register_device(&pxa3xx_device_mci2, info);
+}
+
#endif /* CONFIG_PXA3xx */
extern struct platform_device pxa_device_mci;
+extern struct platform_device pxa3xx_device_mci2;
extern struct platform_device pxa_device_udc;
extern struct platform_device pxa_device_fb;
extern struct platform_device pxa_device_ffuart;
PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
+ PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
};
void __init pxa3xx_init_irq(void)
.get_ro = zylonite_mci_ro,
};
+static struct pxamci_platform_data zylonite_mci2_platform_data = {
+ .detect_delay = 20,
+ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
+};
+
static void __init zylonite_init_mmc(void)
{
pxa_set_mci_info(&zylonite_mci_platform_data);
+ pxa3xx_set_mci2_info(&zylonite_mci2_platform_data);
}
#else
static inline void zylonite_init_mmc(void) {}
GPIO7_MMC1_CLK,
GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */
+
+ /* MMC2 */
+ GPIO9_MMC2_DAT0,
+ GPIO10_MMC2_DAT1,
+ GPIO11_MMC2_DAT2,
+ GPIO12_MMC2_DAT3,
+ GPIO13_MMC2_CLK,
+ GPIO14_MMC2_CMD,
};
static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
GPIO22_MMC1_CLK,
GPIO23_MMC1_CMD,/* CMD0 for slot 0 */
GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */
+
+ /* MMC2 */
+ GPIO24_MMC2_DAT0,
+ GPIO25_MMC2_DAT1,
+ GPIO26_MMC2_DAT2,
+ GPIO27_MMC2_DAT3,
+ GPIO28_MMC2_CLK,
+ GPIO29_MMC2_CMD,
};
#define NUM_LCD_DETECT_PINS 7
};
extern void pxa_set_mci_info(struct pxamci_platform_data *info);
+extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
#endif