Device tree changes to boot FreeBSD on FVPs

FreeBSD does not understand #interrupt-map in a device tree. This prevents the
GIC from being set up correctly. This patch removes the #interrupt-map in the
device trees for the Base and Foundation FVPs. This enables correct boot of
FreeBSD on these platforms.

These changes have been tested with FreeBSD and an Ubuntu cloud image
(ubuntu-16.04-server-cloudimg-arm64-uefi1.img) to ensure compatibility with
Linux.

Change-Id: I1347acdcf994ec4b1dd843ba32af9951aa54db73
Signed-off-by: Achin Gupta <achin.gupta@arm.com>

diff --git a/fdts/fvp-base-gicv2-psci-aarch32.dts b/fdts/fvp-base-gicv2-psci-aarch32.dts
index 3a6007de7567c6bde80aca396f29566482d67048..1560a000e38ec7fff8935d6f76dec9294a93d73a 100644 (file)
--- a/fdts/fvp-base-gicv2-psci-aarch32.dts
+++ b/fdts/fvp-base-gicv2-psci-aarch32.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;

diff --git a/fdts/fvp-base-gicv2-psci.dtb b/fdts/fvp-base-gicv2-psci.dtb
index 245a6c33b7f6ce0c45f9c7ec8f01010b850e3b69..d86cb780484610a1d614bee9e1cf8c75241afe29 100644 (file)
Binary files a/fdts/fvp-base-gicv2-psci.dtb and b/fdts/fvp-base-gicv2-psci.dtb differ

diff --git a/fdts/fvp-base-gicv2-psci.dts b/fdts/fvp-base-gicv2-psci.dts
index fc343baa757981c68d45d91e550482d3308f2b57..941040d8e70f69fc3a6a43eb2f57a368534c0394 100644 (file)
--- a/fdts/fvp-base-gicv2-psci.dts
+++ b/fdts/fvp-base-gicv2-psci.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;
@@ -257,52 +233,6 @@
                         <4 0 0 0x0c000000 0x04000000>,
                         <5 0 0 0x10000000 0x04000000>;
 
-               #interrupt-cells = <1>;
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0  0 4>,
-                               <0 0  1 &gic 0  1 4>,
-                               <0 0  2 &gic 0  2 4>,
-                               <0 0  3 &gic 0  3 4>,
-                               <0 0  4 &gic 0  4 4>,
-                               <0 0  5 &gic 0  5 4>,
-                               <0 0  6 &gic 0  6 4>,
-                               <0 0  7 &gic 0  7 4>,
-                               <0 0  8 &gic 0  8 4>,
-                               <0 0  9 &gic 0  9 4>,
-                               <0 0 10 &gic 0 10 4>,
-                               <0 0 11 &gic 0 11 4>,
-                               <0 0 12 &gic 0 12 4>,
-                               <0 0 13 &gic 0 13 4>,
-                               <0 0 14 &gic 0 14 4>,
-                               <0 0 15 &gic 0 15 4>,
-                               <0 0 16 &gic 0 16 4>,
-                               <0 0 17 &gic 0 17 4>,
-                               <0 0 18 &gic 0 18 4>,
-                               <0 0 19 &gic 0 19 4>,
-                               <0 0 20 &gic 0 20 4>,
-                               <0 0 21 &gic 0 21 4>,
-                               <0 0 22 &gic 0 22 4>,
-                               <0 0 23 &gic 0 23 4>,
-                               <0 0 24 &gic 0 24 4>,
-                               <0 0 25 &gic 0 25 4>,
-                               <0 0 26 &gic 0 26 4>,
-                               <0 0 27 &gic 0 27 4>,
-                               <0 0 28 &gic 0 28 4>,
-                               <0 0 29 &gic 0 29 4>,
-                               <0 0 30 &gic 0 30 4>,
-                               <0 0 31 &gic 0 31 4>,
-                               <0 0 32 &gic 0 32 4>,
-                               <0 0 33 &gic 0 33 4>,
-                               <0 0 34 &gic 0 34 4>,
-                               <0 0 35 &gic 0 35 4>,
-                               <0 0 36 &gic 0 36 4>,
-                               <0 0 37 &gic 0 37 4>,
-                               <0 0 38 &gic 0 38 4>,
-                               <0 0 39 &gic 0 39 4>,
-                               <0 0 40 &gic 0 40 4>,
-                               <0 0 41 &gic 0 41 4>,
-                               <0 0 42 &gic 0 42 4>;
-
                /include/ "rtsm_ve-motherboard.dtsi"
        };
 

diff --git a/fdts/fvp-base-gicv3-psci-aarch32.dts b/fdts/fvp-base-gicv3-psci-aarch32.dts
index ab699151ce9dc2344e32a10ddedbbec69fb5a1b1..dd884f553a636771f6cc860f123157c8f77b3bd0 100644 (file)
--- a/fdts/fvp-base-gicv3-psci-aarch32.dts
+++ b/fdts/fvp-base-gicv3-psci-aarch32.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;

diff --git a/fdts/fvp-base-gicv3-psci.dtb b/fdts/fvp-base-gicv3-psci.dtb
index e175bf02e46c4daadcc8889d59f34d0136c7d986..a105ae6691dcb29c282f903e7b2f4d2f2379e700 100644 (file)
Binary files a/fdts/fvp-base-gicv3-psci.dtb and b/fdts/fvp-base-gicv3-psci.dtb differ

diff --git a/fdts/fvp-base-gicv3-psci.dts b/fdts/fvp-base-gicv3-psci.dts
index 57f351615f121ad33d82d295461a2e68eeb3e518..d81bfbb7b14b07d1e20dd69ffecab4b26046acd9 100644 (file)
--- a/fdts/fvp-base-gicv3-psci.dts
+++ b/fdts/fvp-base-gicv3-psci.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;
@@ -266,52 +242,6 @@
                         <4 0 0 0x0c000000 0x04000000>,
                         <5 0 0 0x10000000 0x04000000>;
 
-               #interrupt-cells = <1>;
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0 0 0  0 4>,
-                               <0 0  1 &gic 0 0 0  1 4>,
-                               <0 0  2 &gic 0 0 0  2 4>,
-                               <0 0  3 &gic 0 0 0  3 4>,
-                               <0 0  4 &gic 0 0 0  4 4>,
-                               <0 0  5 &gic 0 0 0  5 4>,
-                               <0 0  6 &gic 0 0 0  6 4>,
-                               <0 0  7 &gic 0 0 0  7 4>,
-                               <0 0  8 &gic 0 0 0  8 4>,
-                               <0 0  9 &gic 0 0 0  9 4>,
-                               <0 0 10 &gic 0 0 0 10 4>,
-                               <0 0 11 &gic 0 0 0 11 4>,
-                               <0 0 12 &gic 0 0 0 12 4>,
-                               <0 0 13 &gic 0 0 0 13 4>,
-                               <0 0 14 &gic 0 0 0 14 4>,
-                               <0 0 15 &gic 0 0 0 15 4>,
-                               <0 0 16 &gic 0 0 0 16 4>,
-                               <0 0 17 &gic 0 0 0 17 4>,
-                               <0 0 18 &gic 0 0 0 18 4>,
-                               <0 0 19 &gic 0 0 0 19 4>,
-                               <0 0 20 &gic 0 0 0 20 4>,
-                               <0 0 21 &gic 0 0 0 21 4>,
-                               <0 0 22 &gic 0 0 0 22 4>,
-                               <0 0 23 &gic 0 0 0 23 4>,
-                               <0 0 24 &gic 0 0 0 24 4>,
-                               <0 0 25 &gic 0 0 0 25 4>,
-                               <0 0 26 &gic 0 0 0 26 4>,
-                               <0 0 27 &gic 0 0 0 27 4>,
-                               <0 0 28 &gic 0 0 0 28 4>,
-                               <0 0 29 &gic 0 0 0 29 4>,
-                               <0 0 30 &gic 0 0 0 30 4>,
-                               <0 0 31 &gic 0 0 0 31 4>,
-                               <0 0 32 &gic 0 0 0 32 4>,
-                               <0 0 33 &gic 0 0 0 33 4>,
-                               <0 0 34 &gic 0 0 0 34 4>,
-                               <0 0 35 &gic 0 0 0 35 4>,
-                               <0 0 36 &gic 0 0 0 36 4>,
-                               <0 0 37 &gic 0 0 0 37 4>,
-                               <0 0 38 &gic 0 0 0 38 4>,
-                               <0 0 39 &gic 0 0 0 39 4>,
-                               <0 0 40 &gic 0 0 0 40 4>,
-                               <0 0 41 &gic 0 0 0 41 4>,
-                               <0 0 42 &gic 0 0 0 42 4>;
-
                /include/ "rtsm_ve-motherboard.dtsi"
        };
 

diff --git a/fdts/fvp-foundation-gicv2-psci.dtb b/fdts/fvp-foundation-gicv2-psci.dtb
index 5acb139a3cc99c30314df26296bd4246b2972070..9d0cb92846a35050020ccb6cdfef052955f04d6b 100644 (file)
Binary files a/fdts/fvp-foundation-gicv2-psci.dtb and b/fdts/fvp-foundation-gicv2-psci.dtb differ

diff --git a/fdts/fvp-foundation-gicv2-psci.dts b/fdts/fvp-foundation-gicv2-psci.dts
index 0215290289d507add0654938c4fdffd838c68700..03b61dd73bcfafe269f99edb9f0a25704b960370 100644 (file)
--- a/fdts/fvp-foundation-gicv2-psci.dts
+++ b/fdts/fvp-foundation-gicv2-psci.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;
@@ -206,52 +182,6 @@
                         <4 0 0 0x0c000000 0x04000000>,
                         <5 0 0 0x10000000 0x04000000>;
 
-               #interrupt-cells = <1>;
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0  0 4>,
-                               <0 0  1 &gic 0  1 4>,
-                               <0 0  2 &gic 0  2 4>,
-                               <0 0  3 &gic 0  3 4>,
-                               <0 0  4 &gic 0  4 4>,
-                               <0 0  5 &gic 0  5 4>,
-                               <0 0  6 &gic 0  6 4>,
-                               <0 0  7 &gic 0  7 4>,
-                               <0 0  8 &gic 0  8 4>,
-                               <0 0  9 &gic 0  9 4>,
-                               <0 0 10 &gic 0 10 4>,
-                               <0 0 11 &gic 0 11 4>,
-                               <0 0 12 &gic 0 12 4>,
-                               <0 0 13 &gic 0 13 4>,
-                               <0 0 14 &gic 0 14 4>,
-                               <0 0 15 &gic 0 15 4>,
-                               <0 0 16 &gic 0 16 4>,
-                               <0 0 17 &gic 0 17 4>,
-                               <0 0 18 &gic 0 18 4>,
-                               <0 0 19 &gic 0 19 4>,
-                               <0 0 20 &gic 0 20 4>,
-                               <0 0 21 &gic 0 21 4>,
-                               <0 0 22 &gic 0 22 4>,
-                               <0 0 23 &gic 0 23 4>,
-                               <0 0 24 &gic 0 24 4>,
-                               <0 0 25 &gic 0 25 4>,
-                               <0 0 26 &gic 0 26 4>,
-                               <0 0 27 &gic 0 27 4>,
-                               <0 0 28 &gic 0 28 4>,
-                               <0 0 29 &gic 0 29 4>,
-                               <0 0 30 &gic 0 30 4>,
-                               <0 0 31 &gic 0 31 4>,
-                               <0 0 32 &gic 0 32 4>,
-                               <0 0 33 &gic 0 33 4>,
-                               <0 0 34 &gic 0 34 4>,
-                               <0 0 35 &gic 0 35 4>,
-                               <0 0 36 &gic 0 36 4>,
-                               <0 0 37 &gic 0 37 4>,
-                               <0 0 38 &gic 0 38 4>,
-                               <0 0 39 &gic 0 39 4>,
-                               <0 0 40 &gic 0 40 4>,
-                               <0 0 41 &gic 0 41 4>,
-                               <0 0 42 &gic 0 42 4>;
-
                /include/ "fvp-foundation-motherboard.dtsi"
        };
 };

diff --git a/fdts/fvp-foundation-gicv3-psci.dtb b/fdts/fvp-foundation-gicv3-psci.dtb
index 34bf8db662ccd190da6de31ab70f491b6d38c54d..a3164ab40bdbae63f32bc8f5a997d9e7845cfb30 100644 (file)
Binary files a/fdts/fvp-foundation-gicv3-psci.dtb and b/fdts/fvp-foundation-gicv3-psci.dtb differ

diff --git a/fdts/fvp-foundation-gicv3-psci.dts b/fdts/fvp-foundation-gicv3-psci.dts
index 2c84559e95d8bbaea5d7d246654576e6341cce63..1488ed7f757d761b0910125d6fce445ffd279b84 100644 (file)
--- a/fdts/fvp-foundation-gicv3-psci.dts
+++ b/fdts/fvp-foundation-gicv3-psci.dts
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
 /dts-v1/;
@@ -215,52 +191,6 @@
                         <4 0 0 0x0c000000 0x04000000>,
                         <5 0 0 0x10000000 0x04000000>;
 
-               #interrupt-cells = <1>;
-               interrupt-map-mask = <0 0 63>;
-               interrupt-map = <0 0  0 &gic 0 0 0  0 4>,
-                               <0 0  1 &gic 0 0 0  1 4>,
-                               <0 0  2 &gic 0 0 0  2 4>,
-                               <0 0  3 &gic 0 0 0  3 4>,
-                               <0 0  4 &gic 0 0 0  4 4>,
-                               <0 0  5 &gic 0 0 0  5 4>,
-                               <0 0  6 &gic 0 0 0  6 4>,
-                               <0 0  7 &gic 0 0 0  7 4>,
-                               <0 0  8 &gic 0 0 0  8 4>,
-                               <0 0  9 &gic 0 0 0  9 4>,
-                               <0 0 10 &gic 0 0 0 10 4>,
-                               <0 0 11 &gic 0 0 0 11 4>,
-                               <0 0 12 &gic 0 0 0 12 4>,
-                               <0 0 13 &gic 0 0 0 13 4>,
-                               <0 0 14 &gic 0 0 0 14 4>,
-                               <0 0 15 &gic 0 0 0 15 4>,
-                               <0 0 16 &gic 0 0 0 16 4>,
-                               <0 0 17 &gic 0 0 0 17 4>,
-                               <0 0 18 &gic 0 0 0 18 4>,
-                               <0 0 19 &gic 0 0 0 19 4>,
-                               <0 0 20 &gic 0 0 0 20 4>,
-                               <0 0 21 &gic 0 0 0 21 4>,
-                               <0 0 22 &gic 0 0 0 22 4>,
-                               <0 0 23 &gic 0 0 0 23 4>,
-                               <0 0 24 &gic 0 0 0 24 4>,
-                               <0 0 25 &gic 0 0 0 25 4>,
-                               <0 0 26 &gic 0 0 0 26 4>,
-                               <0 0 27 &gic 0 0 0 27 4>,
-                               <0 0 28 &gic 0 0 0 28 4>,
-                               <0 0 29 &gic 0 0 0 29 4>,
-                               <0 0 30 &gic 0 0 0 30 4>,
-                               <0 0 31 &gic 0 0 0 31 4>,
-                               <0 0 32 &gic 0 0 0 32 4>,
-                               <0 0 33 &gic 0 0 0 33 4>,
-                               <0 0 34 &gic 0 0 0 34 4>,
-                               <0 0 35 &gic 0 0 0 35 4>,
-                               <0 0 36 &gic 0 0 0 36 4>,
-                               <0 0 37 &gic 0 0 0 37 4>,
-                               <0 0 38 &gic 0 0 0 38 4>,
-                               <0 0 39 &gic 0 0 0 39 4>,
-                               <0 0 40 &gic 0 0 0 40 4>,
-                               <0 0 41 &gic 0 0 0 41 4>,
-                               <0 0 42 &gic 0 0 0 42 4>;
-
                /include/ "fvp-foundation-motherboard.dtsi"
        };
 };

diff --git a/fdts/fvp-foundation-motherboard.dtsi b/fdts/fvp-foundation-motherboard.dtsi
index cc4df211fede250090e684aa7974a86d55e16501..ae7237b710d214afc8d07ab91777946f923bdc09 100644 (file)
--- a/fdts/fvp-foundation-motherboard.dtsi
+++ b/fdts/fvp-foundation-motherboard.dtsi
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
        motherboard {
@@ -33,13 +9,12 @@
                compatible = "arm,vexpress,v2m-p1", "simple-bus";
                #address-cells = <2>; /* SMB chipselect number and offset */
                #size-cells = <1>;
-               #interrupt-cells = <1>;
                ranges;
 
                ethernet@2,02000000 {
                        compatible = "smsc,lan91c111";
                        reg = <2 0x02000000 0x10000>;
-                       interrupts = <15>;
+                       interrupts = <0 15 4>;
                };
 
                v2m_clk24mhz: clk24mhz {
@@ -88,7 +63,7 @@
                        v2m_serial0: uart@090000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x090000 0x1000>;
-                               interrupts = <5>;
+                               interrupts = <0 5 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -96,7 +71,7 @@
                        v2m_serial1: uart@0a0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0a0000 0x1000>;
-                               interrupts = <6>;
+                               interrupts = <0 6 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -104,7 +79,7 @@
                        v2m_serial2: uart@0b0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0b0000 0x1000>;
-                               interrupts = <7>;
+                               interrupts = <0 7 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -112,7 +87,7 @@
                        v2m_serial3: uart@0c0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0c0000 0x1000>;
-                               interrupts = <8>;
+                               interrupts = <0 8 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -120,7 +95,7 @@
                        wdt@0f0000 {
                                compatible = "arm,sp805", "arm,primecell";
                                reg = <0x0f0000 0x1000>;
-                               interrupts = <0>;
+                               interrupts = <0 0 4>;
                                clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
                                clock-names = "wdogclk", "apb_pclk";
                        };
@@ -128,7 +103,7 @@
                        v2m_timer01: timer@110000 {
                                compatible = "arm,sp804", "arm,primecell";
                                reg = <0x110000 0x1000>;
-                               interrupts = <2>;
+                               interrupts = <0 2 4>;
                                clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
                                clock-names = "timclken1", "timclken2", "apb_pclk";
                        };
@@ -136,7 +111,7 @@
                        v2m_timer23: timer@120000 {
                                compatible = "arm,sp804", "arm,primecell";
                                reg = <0x120000 0x1000>;
-                               interrupts = <3>;
+                               interrupts = <0 3 4>;
                                clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
                                clock-names = "timclken1", "timclken2", "apb_pclk";
                        };
@@ -144,7 +119,7 @@
                        rtc@170000 {
                                compatible = "arm,pl031", "arm,primecell";
                                reg = <0x170000 0x1000>;
-                               interrupts = <4>;
+                               interrupts = <0 4 4>;
                                clocks = <&v2m_clk24mhz>;
                                clock-names = "apb_pclk";
                        };
@@ -152,7 +127,7 @@
                        virtio_block@0130000 {
                                compatible = "virtio,mmio";
                                reg = <0x130000 0x1000>;
-                               interrupts = <0x2a>;
+                               interrupts = <0 0x2a 4>;
                        };
                };
 

diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi
index 6aa40ff4bb9ff44324eb537adb846fefbe0c0caf..8baa829aadcc2d64a28c1f6a5cd6cb0c66701434 100644 (file)
--- a/fdts/rtsm_ve-motherboard.dtsi
+++ b/fdts/rtsm_ve-motherboard.dtsi
@@ -1,31 +1,7 @@
 /*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * SPDX-License-Identifier: BSD-3-Clause
  */
 
        motherboard {
@@ -33,7 +9,6 @@
                compatible = "arm,vexpress,v2m-p1", "simple-bus";
                #address-cells = <2>; /* SMB chipselect number and offset */
                #size-cells = <1>;
-               #interrupt-cells = <1>;
                ranges;
 
                flash@0,00000000 {
@@ -51,7 +26,7 @@
                ethernet@2,02000000 {
                        compatible = "smsc,lan91c111";
                        reg = <2 0x02000000 0x10000>;
-                       interrupts = <15>;
+                       interrupts = <0 15 4>;
                };
 
                v2m_clk24mhz: clk24mhz {
@@ -100,7 +75,7 @@
                        aaci@040000 {
                                compatible = "arm,pl041", "arm,primecell";
                                reg = <0x040000 0x1000>;
-                               interrupts = <11>;
+                               interrupts = <0 11 4>;
                                clocks = <&v2m_clk24mhz>;
                                clock-names = "apb_pclk";
                        };
@@ -108,7 +83,7 @@
                        mmci@050000 {
                                compatible = "arm,pl180", "arm,primecell";
                                reg = <0x050000 0x1000>;
-                               interrupts = <9 10>;
+                               interrupts = <0 9 4 0 10 4>;
                                cd-gpios = <&v2m_sysreg 0 0>;
                                wp-gpios = <&v2m_sysreg 1 0>;
                                max-frequency = <12000000>;
@@ -120,7 +95,7 @@
                        kmi@060000 {
                                compatible = "arm,pl050", "arm,primecell";
                                reg = <0x060000 0x1000>;
-                               interrupts = <12>;
+                               interrupts = <0 12 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "KMIREFCLK", "apb_pclk";
                        };
@@ -128,7 +103,7 @@
                        kmi@070000 {
                                compatible = "arm,pl050", "arm,primecell";
                                reg = <0x070000 0x1000>;
-                               interrupts = <13>;
+                               interrupts = <0 13 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "KMIREFCLK", "apb_pclk";
                        };
@@ -136,7 +111,7 @@
                        v2m_serial0: uart@090000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x090000 0x1000>;
-                               interrupts = <5>;
+                               interrupts = <0 5 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -144,7 +119,7 @@
                        v2m_serial1: uart@0a0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0a0000 0x1000>;
-                               interrupts = <6>;
+                               interrupts = <0 6 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -152,7 +127,7 @@
                        v2m_serial2: uart@0b0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0b0000 0x1000>;
-                               interrupts = <7>;
+                               interrupts = <0 7 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -160,7 +135,7 @@
                        v2m_serial3: uart@0c0000 {
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x0c0000 0x1000>;
-                               interrupts = <8>;
+                               interrupts = <0 8 4>;
                                clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
                                clock-names = "uartclk", "apb_pclk";
                        };
@@ -168,7 +143,7 @@
                        wdt@0f0000 {
                                compatible = "arm,sp805", "arm,primecell";
                                reg = <0x0f0000 0x1000>;
-                               interrupts = <0>;
+                               interrupts = <0 0 4>;
                                clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
                                clock-names = "wdogclk", "apb_pclk";
                        };
@@ -176,7 +151,7 @@
                        v2m_timer01: timer@110000 {
                                compatible = "arm,sp804", "arm,primecell";
                                reg = <0x110000 0x1000>;
-                               interrupts = <2>;
+                               interrupts = <0 2 4>;
                                clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>;
                                clock-names = "timclken1", "timclken2", "apb_pclk";
                        };
@@ -184,7 +159,7 @@
                        v2m_timer23: timer@120000 {
                                compatible = "arm,sp804", "arm,primecell";
                                reg = <0x120000 0x1000>;
-                               interrupts = <3>;
+                               interrupts = <0 3 4>;
                                clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>;
                                clock-names = "timclken1", "timclken2", "apb_pclk";
                        };
@@ -192,7 +167,7 @@
                        rtc@170000 {
                                compatible = "arm,pl031", "arm,primecell";
                                reg = <0x170000 0x1000>;
-                               interrupts = <4>;
+                               interrupts = <0 4 4>;
                                clocks = <&v2m_clk24mhz>;
                                clock-names = "apb_pclk";
                        };
@@ -200,7 +175,7 @@
                        clcd@1f0000 {
                                compatible = "arm,pl111", "arm,primecell";
                                reg = <0x1f0000 0x1000>;
-                               interrupts = <14>;
+                               interrupts = <0 14 4>;
                                clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
                                clock-names = "clcdclk", "apb_pclk";
                                mode = "XVGA";
@@ -211,7 +186,7 @@
                        virtio_block@0130000 {
                                compatible = "virtio,mmio";
                                reg = <0x130000 0x1000>;
-                               interrupts = <0x2a>;
+                               interrupts = <0 0x2a 4>;
                        };
                };